PICMG announced the release of InterEdge, a modular architecture for process control systems (PCS). The IEC 61499 and IEC 61131-compatible InterEdge specification promises to revolutionize the industry with an interoperable, multi-vendor alternative to proprietary Industrial PCs (IPCs), Programmable Logic Controllers (PLCs), and Distributed Control Systems (DCSs). InterEdge defines a vendor-neutral, open standard for edge computing […]
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InterEdge spec released by PICMG to offer multi-vendor interoperability in industrial control
PICMG announces the release of InterEdge, a modular architecture for process control systems (PCS). The IEC 61499 and IEC 61131-compatible InterEdge specification promises to revolutionize the industry with an interoperable, multi-vendor alternative to proprietary Industrial PCs (IPCs), Programmable Logic Controllers (PLCs), and Distributed Control Systems (DCSs). A shared standard for the process industry InterEdge defines […]
Advanced UWB IP supports FiRa 2.0 for high performance in dense, wireless areas
Ceva, Inc. announced the general release of its RivieraWaves ultra-wideband (UWB) IP for FiRa 2.0, the latest technical specification released by the FiRa industry consortium promoting standardization and compliance efforts for the widespread adoption of UWB-driven applications. Leveraging its unique low-power MAC-to-PHY solution, Ceva’s latest generation UWB IP includes a cutting-edge interference cancelation scheme to […]
Advanced, integrated motor drivers feature dsPCI33 DSC for compact motor control designs
To implement efficient, real-time embedded motor control systems in space-constrained applications, Microchip Technology has launched a family of dsPIC Digital Signal Controller (DSC)-based integrated motor drivers. These devices incorporate a dsPIC33 digital signal controller (DSC), a three-phase MOSFET gate driver, and an optional LIN or CAN FD transceiver into one package. A significant benefit of this […]
What is the heterogeneous integration roadmap, and how does it support generative AI?
The heterogeneous integration roadmap (HIR) is an ongoing initiative of the IEEE Electronics Packaging Society. It’s a living document that continues to evolve and expand in response to technological developments like the growth of generative artificial intelligence (AI) and quantum computing. This FAQ starts with a brief overview of heterogeneous integration, looks at the scope […]
Wireless SoC features low power consumption and enhanced security features
Sony Semiconductor Israel announced that its advanced ALT1350 Wireless System on Chip (SoC) is now commercially available. LPWA cellular modules have been designed by our partners and industry leaders AM Telecom, Fibocom, Murata, Quectel, Semtech, Telit Cinterion, and Wistron NeWeb Corporation (WNC). The modules are now available for sampling, with mass production expected during the […]
How does the open domain-specific architecture relate to chiplets and generative AI?
The Open Domain-Specific Architecture (ODSA) is a project within the Open Compute Project (OCP) community to establish open physical and logical die-to-die (D2D) interfaces for chiplets. The goal is to democratize the design and use of chiplets for domain-specific high-performance computing (HPC) applications like generative artificial intelligence (AI). Domain-specific architectures (DSAs) are an emerging approach […]
High-speed, low-power embedded processor technology helps advance vision AI
Renesas Electronics Corporation announced the development of embedded processor technology that enables higher speeds and lower power consumption in microprocessor units (MPUs) that realize advanced vision AI. The newly developed technologies are as follows: (1) A dynamically reconfigurable processor (DRP)-based AI accelerator that efficiently processes lightweight AI models and (2) Heterogeneous architecture technology that enables […]
How do heterogeneous integration and chiplets support generative AI?
Chiplets are here, and more are coming. They can overcome the yield limitations of large ASICs, support a mix-and-match strategy for heterogeneous semiconductor IPs and multiple process nodes, improve thermal performance, and speed time to market. They are being used in a range of high-performance computing (HPC) applications, notably generative artificial intelligence (AI) and machine […]
Securing devices for the IoT – FIPS 140-3 and common criteria
For developers of IoT devices and networks, the Federal Information Processing Standard (FIPS) 140-3 and the Common Criteria (CC) serve different but complementary functions. FIPS 140-3 is designed for validating software and hardware in cryptographic modules, while CC is designed to evaluate security functions in IT software and hardware. In both cases, there are related […]