The benefits of open source have been bestowed upon an Instruction Set Architecture (ISA) called RISC-V. One of the earliest, best-known examples of open source technology is Linux. For a widely accepted, official definition of open source, see The Open Source Initiative. Open source does not stop at Linux, however. One of the more recent […]
RISC-V
FPGA development board for PolarFire designs
Microsemi Corporation and Future Electronics announced the availability of the Avalanche board featuring a Microsemi PolarFire non-volatile field programmable gate array (FPGA). As the lowest cost entry development board available today for designing with Microsemi’s lowest power, cost-optimized mid-range PolarFire FPGAs, Future’s Avalanche board lowers the barrier to entry for PolarFire FPGAs and helps expand Microsemi’s market opportunities for the device. The […]
RISC vs. CISC Architectures: Which one is better?
Reduced Instruction Set Computer (RISC) is a type or category of the processor, or Instruction Set Architecture (ISA). Speaking broadly, an ISA is a medium whereby a processor communicates with the human programmer (although there are several other formally identified layers in between the processor and the programmer). An instruction is a command given to […]
Top microcontroller stories of 2017
Here are the microcontroller features that got the most interest from readers in 2017. What is an open drain? Open-collector and -drain devices sink current when controlled to one state and have no current flow (i.e., output a high impedance state) in the other state. It is fairly common to use open-drains (open-collectors) together […]
RISC-V ecosystem surpasses 100 members globally
The RISC-V Foundation, a non-profit corporation controlled by its members to drive the adoption and implementation of the open, free RISC-V instruction set architecture (ISA) forward, today announced that the Foundation’s membership has exceeded more than 100 organizations, individuals, academics and universities from 19 countries and six continents around the world. Since its inception in 2015, […]
Development tools speed design of RISC-V platforms
Microsemi Corporation announced the company’s new Mi-V ecosystem with industry leaders, to increase adoption of its RISC-V soft central processing unit (CPU) product family. The announcement comes as the company also introduces Mi-V RV32IMA and additional field programmable gate array (FPGA)-based soft CPU solutions ideally suited for designs utilizing RISC-V open instruction set architectures (ISAs). RISC-V, an ISA which is a […]
RISC-V, 64-bit multicore CPU for full-featured OS embedded applications
SiFive , announced the availability of U54-MC Coreplex IP, the industry’s first RISC-V based, 64-bit, quadcore real-time capable application processor with support for full-featured operating systems such as Linux. The free and open RISC-V architecture, which is supported by an ecosystem comprising more than 70 companies, has seen tremendous growth in the embedded segment. The release of […]
Webinar: The RISC-V ecosystem is ready for prime time. Get started here! – October 25
Wednesday, October 25, 2017 2:00pm EDT / 11:00am PST The RISC-V ISA (instruction set architecture) is redefining the embedded processor marketplace. The open architecture of the RISC-V ecosystem has developed critical mass. Be on the leading edge of what is the next big thing. Attend this webinar to learn about: Fixed ISA allows customization for […]
Debug and trace technology added to open-source RISC-V CPU platform
SiFive, the first fabless provider of customized, open-source-enabled semiconductors, today announced that UltraSoC will provide debug and trace technology for the SiFive Freedom platform, based on the RISC-V open source processor specification as part of the DesignShare initiative. UltraSoC’s embedded analytics IP will be available through the recently announced SiFive DesignShare ecosystem that gives any […]
Eclipse integrated development environment targets RISC-V open instruction set designs
Microsemi Corporation announced the release of its SoftConsole version 5.1, the world’s first available Windows-hosted Eclipse integrated development environment (IDE) for designs utilizing RISC-V open instruction set architectures (ISAs) such as RV32I. SoftConsole, Microsemi’s free software development environment enabling rapid production of C and C++ programming language designs for its field programmable gate arrays (FPGAs), will be showcased at […]
