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PCB Design

Mistakes to avoid when submitting a design for PCB assembly

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Simple prototype Printed Circuit Boards (PCBs) require, on average, 11.6 physical prototypes, whereas more complex PCBs require as many as 16.[i] And according to Advanced Assembly, a prototype PCB assembly house, “94% of assembly data is accidentally submitted with errors.”[ii] PCB assembly houses will extract design data from PCB design files and create a PDF image.

A good assembly house has engineers who review and verify your design for component fit and rotation, identifying mistakes for customers. Catching another’s mistakes is decent, but can cause delays, especially if the PCB assembler can’t quickly find a correction for a simple error by looking at other project files.

Some common mistakes that can cause delays or create unusable PCBs include:

  1. Missing or corrupt design files such as Gerber files (including the stencil or paste mask layer), any XYRS data files, and the Bill of Materials (BOM) cause delays. All the files are used in fabricating a PCB. Gerber files (.GBR) describe the layers of the PCB, which can include layers made of copper (e.g., traces and ground planes), solder masks, data for drilling holes on the PCB, silkscreens, the board outline (which may be included in another file), information on inner layers, and so forth. XYRS files have a .XYRS extension and are used for placing parts in automated pick-and-place systems. XYRS files indicate where the part is placed on an X-Y axis, component rotation, which side of the PCB the component is located, the type of component (surface mount or through-hole), part footprint, and a few other details. A BOM is a list that includes a short reference name, a part number, the manufacturer, and the quantity of every component on the PCB, but does not typically note location. Review the BOM carefully. Many mistakes are made in a BOM simply because you’ve looked at it so many times that your brain automatically assumes that it’s correct just as it was three design revisions ago! Carefully number your reference designators so that it’s unambiguous as to which component goes where. Make certain that all design files are provided, not corrupted, and in the correct format for the PCB assembler.
  2. Incorrect markings on a PCB can cause components to be stuffed Make sure that the polarity markings on the PCB are correct and present. E.g., if you have a diode, make sure the anode and cathode are marked correctly. A polarized capacitor should be indicated with a plus sign in the correct place on the PCB. For an Integrated Chip (IC), identify pin one by marking it in the correct location on the PCB. Circuit simulators can add virtual parts, so make sure your final PCB files include or exclude them as needed.
  3. Sub-optimal sizes for land patterns can be a subtle problem. A land pattern has a slightly different meaning than a footprint, although they are often used However, for PCB assemblers, there’s a huge difference between them that affects manufacturing quality. A footprint is the imprint of a component (that is sometimes loosely termed “real estate”) for the PCB surface area that’s consumed. Think of the footprint as you would if you pressed the component into soft dirt. A land pattern refers to both the outline and the size of the pads required for a component on a PCB. The land pattern will always be larger than the footprint since the land pattern designates the PCB pads where component leads will be landed and soldered. Land patterns are normally identified in component datasheets and should match up accurately with the component footprint. (See Figure 1). Proper land patterns will improve manufacturability.

 

PCB assembly
Figure 1: The land pattern for the Texas Instruments MSP430FR247x family of mixed-signal microcontrollers. (Source: TI Datasheet SLASE07.PDF)
  1. Missing notes on height and length requirements on drawings can make it so your board will not fit into the enclosure that may already be fixed. Don’t forget the total height and thickness of your PCB may affect your ability to fit it into a fixed space after components have been stuffed. If your project is size-restricted, then start the design by placing taller components where height clearance is less of a concern. Another tip – note that standard sized PCBs can make a difference in cost versus custom sizes.
  2. Missing additional information can lead to avoidable issues. The PCB assemblers cannot read your mind. Use a readme.txt file bundled with all the other files to add any special instructions or otherwise missing information. Other files can assist PCB assemblers in interpreting a mistake-free PCB for you, therefore, provide notes, schematics, 3D drawings, and identify any specific features (even how you plan to use the PCB) that will help them form a complete picture.

Meticulously reviewing your project, the PCB layout, and all files and information can make a world of difference in debugging your prototype later. Simple mistakes can burn hours or days in troubleshooting. For instance, choosing the wrong component or putting a component in the incorrect place will complicate the whole process. At best, such mistakes will create delays as the best PCB assembler finds a component marked for a spot that does not match the location’s land pattern. The worst case will be a finished PCB that doesn’t work.

Bundle all your files together by creating a .ZIP or .RAR file. Sending files as multiple separate attachments in different emails can cause delays. Remember that the PCB maker will likely have dozens, hundreds, or even thousands of customers that have submitted their files in the same day or week, with multiple employees handling the incoming requests. A request that’s fractured across two or more emails or uploads may not reach the same person handling your first submission. Bay Area Circuits has a free InstantDFM™ tool that can identify potential production issues in your files before you actually submit them, whether or not you actually use their services.

PCB assembly is placed on hold if it’s missing information, files, special or rare parts for population, or if it includes incomplete information or corrupted files. It’s a universal rule of thumb that any project (across all engineering disciplines) will cost more the longer it takes. Delays almost always add to the total cost, and prior planning prevents poor performance.

[i] https://www.aapcb.com/blog/3-things-affect-your-pcb-assembly-quote/

[ii] https://aapcb.com/knowledge-center/5-common-design-mistakes/

Quad port expander simplifies PCB layout for high-speed interfaces

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PI7C1401 quad port expanderDiodes Incorporated announced the introduction of the PI7C1401 quad port expander. The PI7C1401 is a cost-effective solution to low-speed signal management and I2C aggregation in advanced embedded systems using multiple high-speed interfaces. The PI7C1401 is suitable for any application that features multiple high-speed transceivers, including standard SFP (small form-factor pluggable), dual SFP (DSFP) and quad SFP (QSFP), such as baseband units, routers, and switches as found in telecommunications, networking and data centers.

Typically, each transceiver requires a dedicated control channel to a host, which is normally implemented using low-speed signal pins and a low-speed protocol, such as I2C and others. As systems become more complex they require more transceivers, putting increased pressure on the host controller to support many more I2C interfaces and other low-speed signal pins.

Using the PI7C1401, four low-speed ports can be aggregated into a single channel and by combining multiple quad port expanders, a host processor can control up to 56 transceivers through a single I2C/SPI interface. This can significantly lower the pin-count on the host processor or FPGA used to control the high-speed transceivers, as well as ease PCB layout and reduce the overall bill-of-materials (BoM).

The I2C interface supports 1MHz fast mode and allows up to 14 PI7C1401 devices to share a single interface. The devices automatically configure their respective addresses by daisy-chaining their control pins. A bus speed of up to 33MHz is supported when using SPI mode, which effectively allows an unlimited number of PI7C1401 devices to share a single SPI interface. In addition to port aggregation, the PI7C1401 provides a number of other useful features, including four user-programmable GPIO, along with two outputs dedicated to driving status LEDs.

The PI7C1401 also supports automatic pre-fetching of user-defined critical data from the modules, as well as customizable data-driven interrupts, the ability to burst read/write the I2C/SPI interfaces, and a broadcast mode that allows all ports to be written to simultaneously. These features greatly increase the efficiency of PI7C1401’s port control in highly demanding applications.

The PI7C1401 quad port aggregator also supports separate host-side I/O voltages, from 1.8V to 3.3V. It is available in a 56-ZF (TQFN) package measuring 5mm x 11mm at 0.5mm pitch, allowing it to be surface-mounted to the underside of a PCB and close to the physical interfaces. It is available immediately and priced at $2.70 in 1000 piece quantities.

Retargeting existing tests in an integrated SoC verification flow

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by Matthew Ballance, Mentor, a Siemens Business

The raison d’etre for portable stimulus is reuse. The Accellera Portable Stimulus Standard (PSS) promotes test intent reuse throughout the verification process and across the multiple engines on which those verification runs are performed. Test intent captured as portable stimulus models enables test reuse from the IP to SoC levels and boosts test-creation productivity.

As users consider applying portable stimulus, one immediate realization is the limited amount of portable stimulus content currently available within their organizations. Fortunately, there are many existing descriptions and formats within an organization that can be reused to create portable stimulus descriptions.

UVM register models and SystemVerilog classes and constraints are examples of existing descriptions that can be productively reused with portable stimulus.

In this four-part series, we will show you how to use UVM and SystemVerilog descriptions that you may already have, so you can jump-start the creation of portable stimulus models. We will begin with UVM register models.

UVM register models are heavily used at the block and subsystem levels to simplify interacting with device registers. The information captured within a register model description – register addresses, which fields can be written, etc. – is very helpful in creating SoC integration tests. In addition, this information is captured in a machine-readable way which makes it easy to automate reuse of this key portable stimulus information.

The UVM library provides built-in, directed sequence tests that iterate through a UVM register model to check the reset value of registers and confirm that registers are accessible. These sequence tests are incredibly useful at the IP level, but reusing them at the subsystem and system levels remains difficult.

This is where the PSS comes in. Capturing register-test intent in a portable stimulus model makes register-test functionality portable from the IP to the SoC level and provides more flexibility in controlling which registers are checked in a given test run.

Splitting the atom: Test intent and realization

Separating test intent and test realization, which are typically merged in a directed test, is a core element of portable stimulus, and this division is key to enabling test intent to be easily retargeted across environments. Test intent is the high-level design of what to test. Test realization is the mechanism by which that test is carried out.

In the case of testing a register model, test intent looks something like this: select a register from the register block; select a read/write field from the register, and select a bit within that field to test.

The test intent described above is independent of whether we are verifying a block, subsystem, or SoC level design. It is also independent of whether a SystemVerilog environment or an embedded-software environment is targeted. The test intent for testing a single register is captured by the PSS code below, where: reg_id captures the register being tested, flip_bit captures the bit within the register to be tested, and reg_addr captures the address of the field in the memory maps.


Designing the test realization with portable stimulus in mind allows us to design a common API that will be available in all environments. For example, we might specify that a method named testbit will be available in all environments, and that this method will test the ability to modify the specified bit. The function prototype for such a function is shown below.

In a SystemVerilog IP or subsystem level environment, we could implement this method as a task within a UVM sequence. The SystemVerilog task shown below uses a memory-access API to read and write memory and implements the register bit-test operation by reading the current value of the register, negating the target bit of the register and writing the new register value, and reading back the register address and checking whether the bit retains its value.


Birth of a subsystem register model

In this case, the test will continue to run if an error is encountered. This is pretty typical of UVM tests. However, an embedded software environment has different constraints. The example below shows an implementation of the testbit function for an embedded processor. This approach is very similar to the SystemVerilog version, though the specifics are different. One of the biggest differences is that, in this case, we assume if a register bit test fails, we will end the entire test.

Now we will create a subsystem UVM register model. The example subsystem in figure 1 has a processor, two Ethernet controllers, and two DMA engines.

SoC verification flow
Figure 1 – Simple Subsystem

A UVM register model was created at the block level, most likely using a register-creation tool (see figure 2), for the Ethernet and DMA controllers during verification.

Figure 2 – Register Creation Tool

At the subsystem level, a register-creation tool may help us to assemble a register model for the entire subsystem. Or we may simply take the individual block-level register models and assemble the subsystem-level register model manually. The code below assembles a subsystem-level register model from the Ethernet and DMA controller register models. Not much code is required: only the available registers in the design, and their addresses, and the fields within those registers and any access restrictions.

What might be surprising is just how quickly the number of registers accumulates. By the time we’ve created a register model for just two Ethernet controllers and two DMA controllers, we have 989 registers with testable fields. Imagine how many registers a full SoC contains!

Now that we’ve seen how to capture a subsystem or SoC level register model, how do we proceed to create register-access tests? First, we need to create a PSS model of the register-access test intent. Then, we need to connect that test intent to specific verification environments with test realization.

The next article in this series will show you just how to do that.

 

Additional Resources:

https://accellera.org/activities/working-groups/portable-stimulus

https://verificationacademy.com/topics/portable-test-stimulus

https://www.mentor.com/products/fv/infact/

 

Matthew Ballance is a Product Engineer and Portable Stimulus Technologist at Mentor Graphics, working with the Questa inFact Portable Stimulus product. Over the past 20 years in the EDA industry, he has worked in product development, marketing, and management roles in the areas of HW/SW co-verification, transaction-level modeling, and IP encapsulation and reuse. Matthew is a graduate of Oregon State University.

 

 

Understanding single-ended and differential communication systems

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Do you know the difference between single-ended and differential communication schemes? And when should you use them, which one you should use, and why?

Single-ended communications set ups are meant to be used only for short runs or to provide communication between devices on the same Printed Circuit Board (PCB). Single-ended communications will reference the signals with respect to ground. However, as the designer attempts to move devices farther apart from each other, the signals in a single-ended communications bus become susceptible to Electromagnetic Interference (EMI). EMI causes the ground and signal levels to shift out of spec such that bit levels cannot be distinguished. However, a differential communication (or signaling) system can significantly extend the distance between wired devices.

TTL logic levels

Electronic designs rely on the interconnectivity of the components to function. When components are in close proximity of each other, such as residing on a common PCB, the designer typically connects components directly with respect to a common digital ground plane on the board. The length of the board traces is short enough where signal loss from the resistance of the traces is negligible. Digital components can be easily connected as long as the components use the same logic levels.

While there is little concern about line loss, direct connections of discrete logic components can take an excessive amount of board space to route all the necessary traces for complex devices. Consider the memory circuit shown in Figure 1. Using discrete memory integrated circuits (ICs), there are more than 120 connection points, just so we can access a measly 4 Kilobytes of memory. Imagine how many connection points there would be and the size of the PCB required to support 4 Megabytes or even 4 Gigabytes of memory using this scheme!

 

single-ended and differential communication
Figure 1: Discrete Component Memory Design. (Image:  docplayer.br)

Modern memory

The ability to multiply the memory circuit above in Figure 1 comes from improved technology and manufacturing methods that move thousands of circuit connections on board a single chip. But with all the connections moved on board a single IC, how do you access the memory? Again, improvements in manufacturing and technology allow designers to interface with the device over a serial communication system. An SD Card is just one example of a serial memory device. While the latest cards can use a more advanced serial protocol, all SD Cards support the legacy SPI interface.

Figure 2:  SD Card (Image: sandisk.com)

SPI interface

SPI stands for Serial Peripheral Interface. SPI (sometimes called “spy”) is a synchronous serial communication interface that uses only four wires for its connection to other devices. Data transfer takes place between a master device like a microcontroller and a slave device like an SD card using a serial clock (SCLK), two data lines (MOSI and MISO), and a Slave or Chip Select (SS).

Figure 3: SPI Interface connections.  (Image:  sohu.com)

The detail of the SPI protocol is beyond the scope of this article. However, the SPI example is mentioned because the communication signals are referenced from ground. Referencing communication signals from ground is also called “single-ended communication.” The characteristics of single-ended or logic level-based communications are that the connection needs to be short enough to prevent line loss and provide noise immunity from electromagnetic noise. This is why you see SD Cards used in cell phones, computers, and embedded controllers where they are designed on the same printed circuit board as the microcontroller or microprocessor they serve. The SPI interface does not lend itself to being connected remotely over a long distance from the microprocessor it supports.

I2C interface

I2C (Inter-Integrated Circuit) is another common serial communication protocol. Like SPI, I2C is a synchronous serial communication interface. “Synchronous” means that it transfers data a bit at a time along the Serial Data Line (SDA).  However, I2C requires only two wires for communication: The Serial Data Line (SDA) and the Serial Clock Line (SCL). While only two wires are needed for I2C compared to the four wires of SPI, I2C has a slightly lower transmission rate than SPI. One example of a memory chip that uses I2C is Microchip’s 24CW64. With only two pins for power and two pins for the I2C interface, this device can store 64 Kilobytes of data for a microprocessor. Just like the SPI example, the I2C EEPROM uses single ended, ground-to-Vcc digital logic levels for the I2C lines. Since memory chips are typically mounted near the microprocessor, concerns about line loss and noise immunity are low.

Figure 4: I2C Interface. (Image: https://nguyentiensk.wordpress.com)

The I2C communications bus has expanded well beyond merely serial access to memory chips. Hundreds of peripheral devices exist that use I2C for easy integration to microcontrollers:

  • Temperature Sensors
  • Accelerometers
  • Proximity Sensors
  • GPIO Expanders
  • Touch Sensors
  • Color Sensors
  • Distance Sensors
  • Driver Control
  • OLED Displays
  • Other microcontrollers
  • A-to-D Converter
  • Light Sensors

Indirectly, interfacing to these devices is just like accessing the external memory locations of the microcontroller. If it makes sense for the peripheral to be mounted on the same PCB as the microcontroller, the designer still has little concern about line loss and electromagnetic noise immunity.

Electromagnetic interference: the problem with distance

What if you need a sensor in a location that’s remote from the microcontroller? Suppose you want to measure the temperature of something that exceeds the operating temperature of the microcontroller? You would need the thermocouple and sensor to be placed at a distance from the microcontroller. In another application, suppose you want to provide feedback to the user on a remote OLED display? Even passing messages between two microcontrollers in a distributed design would require communicating over a longer distance than the restraints of a single printed circuit board.

As the distances increase between I2C devices, the communication lines become more susceptible to EMI again. The effects of EMI may not appear obvious at first, but these problems are all around us in the physical environment. One basic electromagnetic principle is that current flowing through a conductor produces a magnetic field along the axis of the conductor. In turn, a conductor in a magnetic field will produce current in the conductor (Faraday’s Law). These two principles are how transformers, motors, and generators work.

Figure 5 Current Induces Magnetic Field (Image: Wikipedia)

But how do these principles affect the digital communication systems discussed above? As the designer starts to move peripheral devices off of the PCB of the microcontroller or attempts to talk between microcontrollers separated by larger distances, the communication lines become more susceptible to the inductive coupling of other devices in the environment. The communication lines are susceptible to having undesired current coupled into them by stray magnetic fields from transformers, motors, and other electro-mechanical devices. Relays and solenoids can be particularly troublesome using digital communications, due to the high in-rush of current when they engage and disengage. The current coupled into a single-ended digital communication system can drive the digital logic levels well above and below the accepted digital logic levels of the system. Influencing the logic levels to an unknown state between a digital high and low is just as troublesome for the data integrity of the digital communication system. While you should take care to try to prevent such interference, it cannot always be avoided.

Differential communication

At the cost of some more complex circuity and design considerations, the engineer can minimize the effects of electromagnetic interference. The most significant improvement can be the utilization of differential communication drivers to replace single-ended communication over long distances.

For differential I2C, our system goes from 2 wires to 4 wires. We still only have the data line (SDL) and clock line (SCL), but we will use two wires for each signal. As the name “differential” communication suggests, the digital value of a bit is the difference in the voltage level between the two lines for each signal. The precise voltage levels of each line become less important. Rather, it is which line is more positive than the other that determines whether a digital 1 or 0 is received. The differential transceivers on each end of the communication line will convert the differential signals to the digital voltage logic levels of the microcontroller(s).

When you choose wiring for differential communication, consider keeping both wires for a single data signal as close as possible to each other. A multiconductor cable or “twisted pair” wiring is excellent for maintaining that closeness. The reason you want to choose wiring like this is so that any influence from an external electromagnetic field will influence the voltage induced in both wires, and in the same way. If the electromagnetic field creates a one-volt drop in the differential communication lines, both conductors see the same voltage drop. Even though the absolute voltage level has changed, the difference between the two wires remains the same. In this way, the integrity of the data being transmitted over the differential line is maintained.

Figure 6: Differential I2C Transmission. (Image: Wikipedia)

While you are trying to keep your single ended I2C solution within the size of a single circuit board, the differential solution can support distances of up to 10 meters at a 10K bits per second.

An example of an I2C differential driver is the PCA9615 by NXP Semiconductors uses this chip in a breakout board for prototyping and bench testing, too.

Figure 7: Spark Fun PCA9615 Break Out Board. (Image:  Sparkfun.com)

The PROs and CONs

Utilizing serial communication protocols can greatly reduce the number of connection points or pins as well as the size of your PCB design. If the design can be kept to a single PCB, single-ended communication between micro-controllers and peripherals is the easiest and most cost-effective solution. However, care must be taken if the peripherals need to be off-board or you need to communicate between microcontrollers over a significant distance. In these cases, spending the extra time and money to integrate a differential communication system is well worth the increased performance and reliability.

Choosing PCB materials to optimize applications, Part I

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There are many different materials and methods for creating PCB materials. The electronics used in numerous applications benefits from the large number of options for PCBs. Hobbyists often choose the least expensive PCB, however, it’s essential to choose appropriate PCB materials when prototyping is done, and high-volume product development and manufacturing become the focus. Applications that use high-speed signals, digital or analog, are the most likely to benefit from a detailed consideration of PCB materials such as the roughness of copper traces and uniform fiber weaves and resin that have dielectric constants that are as similar as possible. Detailed considerations of PCB materials for high-frequency signals improves signal integrity.

What concerns should you have about the PCB for your application?

The materials used for the PCB matter if the application requires anything from rugged construction for harsh environments such as outer space to extreme flexibility in a PCB for a wearable electronics device. High-frequency signals and circuits are especially more complicated to design; therefore, PCB material selection is more critical with high-speed circuit designs. Applications that typically need high-performance PCBs include routers, servers, power amplifiers, transceiver modules, and any high-speed data channels (e.g., PCIe 4.0 and higher.)

The type of signals in the circuit on the PCB may greatly benefit the circuit’s operation based on how the PCB is constructed, as well, not just how the circuit is designed. There are a number of other options in creating a PCB that affect circuit operation and performance, including rough or smooth copper traces, dielectric constants, materials that might need to be resistant to specific environments such as humidity, skin effects, the ability of the PCB to withstand physical stress, and the number of layers in the PCB that  affect size and cost. Other PCB considerations might be the ease of production, form factor, and system integration requirements.

Materials: Rigid to flexible and everything in between

PCB technology has not only improved but has enabled new applications. Early prototypes that are used to test the circuit design are a step above breadboarding the circuit. Circuit design can be simulated but modeling a circuit is never as detailed as building the circuit, so every possible parameter is in play. Modeling and simulating circuits is only as good as the number of parameter data programmed into each component model. After simulating circuit operation, the circuit might be implemented on a bread-board or as a prototype on a cheap, rigid PCB. The PCB materials for the prototype may be lower cost because bugs need to be worked out on the circuit design and tests will reveal performance issues in the worst case.

Improving the PCB materials will improve performance. Therefore a prototype using the best materials for the intended application is built and tested. For example, a PCB that will be launched into space will need to be robust, hardened against radiation, and made of materials that reduce potential problems. Another application, such as a wearable temperature-monitoring wireless communicating device, would have extremely flexible PCB with very different materials. For example, the Blue Spark TempTraq is a wearable thermometer patch that sends temperatures at regular intervals to a smartphone. According to Blue Spark, “Printed electronics is the term used for a relatively new technology that defines the printing of electronic circuits and components on common media such as paper, plastic, and textile, using standard graphic arts printing processes and press equipment. But instead of using standard inks, newly developed electronic inks are used to print active devices, such as thin film transistors and thin printed batteries. Although the concept of printed electronics has been around for some time, recent advances in conductive ink chemistry and flexible substrates promise to deliver a flood of new markets and applications.”[i]

Figure 1: The wearable TempTraq is a flexible printed circuit patch that delivers continuous, wireless Bluetooth temperature readings to smartphones within range using a soft, flexible battery technology. TempTraq is FDA-cleared in the U.S. and earned CE Mark approval for Europe.

The application affects the type of PCB that’s needed. For example, in the case of a microcontroller (MCU) board that’s used for training and/or development, a rigid PCB is suitable as training and development boards are frequently exposed to mechanical stress and vibrations when plugging or unplugging connectors and jumper wires. A rigid PCB can withstand multiple insertion and withdrawal connections, whereas a flexible PCB offers different benefits like the TempTraq thermometer patch or other disposable or wearable devices.

Wearable biosensors, for example, can be developed on extremely flexible PCBs so that the circuit can withstand both folding and mechanical stress as they are worn on the skin.[ii]  The robustness, high performance, and life of an electronic product depend upon the PCB that’s used.

In other applications, the size and value of the product don’t matter as much as whether the product is reliable and offers a remarkable user experience. User experience can be enhanced if the product is strong enough to withstand accidental falls or vibrations.  For instance, a television remote is often dropped, but the ideal PCB material for this type of application holds together and doesn’t fall apart. Similarly, other digital electronic products such as microwaves and Automatic Teller Machines (ATMs) are frequently used and often by multiple users. Nevertheless, these sturdy devices function efficiently over a long lifetime. Buttons can fail after millions of times getting pressed. A PCB can malfunction due to excessive temperatures. Overall, the careful selection of PCB materials can avert flaws, making the product more robust. [iii]

How many layers for your PCB?

Single-sided PCB
Single-sided PCBs are printed with a conductive layer on only one side. They are the most common type of PCB, and in use since the 1950s. Single-sided PCBs are still used in both commercial and academic projects because they are both easy to use and cheap. Single-sided PCBs are often still used in power supplies, LED lighting, vending machines, and industrial relays. [iv]

Double-sided PCB
Double-sided PCBs offer a more enhanced platform for circuit development. Both the top and bottom layer are used for routing signals, which reduces the board’s overall size. Reducing board size can reduce the cost of a product, especially if the PCB requires an enclosure. The PCB’s layers are connected using vias. A via is a hole that electrically connects a node (e.g., a pad) from the top to the bottom side of the PCB.

PCB materials
Figure 2: Different types of vias: (1) Through hole (2) Blind via (3) Buried via. The gray and green layers are nonconducting, while the thin orange layers and vias are conductive. (Image credit: M Adler – Own work, CC BY 3.0)

Double-sided PCBs are considered to be the most popular type of PCBs. Examples of some primary applications that commonly use double-sided PCBs are converters, industrial controls, traffic systems, and control relays. [v]

Multilayer PCB
Multilayer PCBs contain three or more sets of conductive and dielectric layers. The PCB’s conductive layers are separated by a dielectric layer. Layers can be interconnected using vias. Multilayer PCBs can accommodate a considerable network of traces within a limited area, which can reduce both the cost and overall size of the end product.  Multilayer PCBs are used in computers, GPS technology, atomic accelerators, fiber optic receptors, space probe equipment, and many other products.[vi]

Different types of PCB materials and their uses

Aluminum PCB
The base core of the PCB consists of aluminum, which enables a high level of thermal dissipation by the PCB. The overall performance and durability products are enhanced as the circuitry cools down efficiently. Aluminum PCBs are environmentally friendly since the aluminum is recyclable. The mechanical strength is also remarkable as compared to its total weight. An aluminum PCB benefits both high power and thermally sensitive circuits. [vii]

Flexible PCB
As the name suggests, flexible PCBs are flexible, and they can be folded or bent to some extent. They are made from plastic materials such as polyimide, which adds elastic properties to the PCB.[viii] Flexible PCBs establish electrical circuits while efficiently managing mechanical challenges. They are widely used in medical, military, and industrial applications. [ix]

Rigid PCB
Rigid PCBs are the most common type of PCBs in use. They are cheaper than other types of PCBs. Rigid PCBs are inflexible, and their shape cannot be changed, unlike flexible PCBs. A computer motherboard is a typical example of rigid PCB. [x]

Rigid-flex PCB
Rigid-flex PCBs are a combination of rigid and flexible PCBs. The combination enables the development of mechanically challenging designs. Rigid-flex PCBs can replace an older, more traditional combination of rigid PCBs, connectors, and cables. As the mechanical connections are reduced, the overall efficiency of electrical contacts is enhanced, and the flexible part protects the circuit from mechanical hazards. [xi]

Rigid-flex PCBs are used in military, aerospace, medical, telecommunication, automotive, and industrial applications. [xii]

This just scratches the surface of the available choices in PCBS beyond available options in layers.

Next: Part II, which type of Printed Circuit Board (PCB) materials would be worth investing in to improve signal integrity?

 

[i] https://www.bluesparktechnologies.com/index.php/industry-solutions/about-printed-electronics
[ii] https://www.molex.com/molex/products/family?key=medical_wearables&channel=products&pageTitle=Introduction
[iii] https://www.pcbcart.com/pcb-capability/pcb-materials.html
[iv] https://www.amitroncorp.com/printed-circuit-boards/single-sided.html
[v] https://www.amitroncorp.com/printed-circuit-boards/double-sided.html
[vi] https://www.amitroncorp.com/printed-circuit-boards/multilayer.html
[vii] https://www.pcbway.com/pcb_prototype/General_introduction_of_Aluminum_PCB.html
[viii] http://www.pcbuniverse.com/pcbu-flex-pcb.php
[ix] https://pfcflex.com/applications/
[x] https://www.theengineeringprojects.com/2018/04/rigid-pcb.html
[xi] https://www.cicor.com/products-services/printed-circuit-boards/rigid-flexible/
[xii] http://www.rigiflex.com/faq/rigid-flex-pcbs-applications

Why clean PCBs matter, Part 1

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Printed circuit boards (PCBs) are essential in modern electronics. Dust and other contaminants are more important to watch out for than ever. As components get smaller, the relative size of contaminants is larger, heat is more of an issue with densely packed circuits on modern ICs, and devices operating at high frequencies (~1 GHz and higher) are more susceptible in many ways.

PCBs are somewhat delicate, so they are usually housed in a cage, case, or chassis. Despite the physical protection that a case provides, processors can run hot and need ventilation to eject heat build-up. Even without a fan, a PCB can still be exposed to dust and liquid pollutants, which can affect performance. Contaminants attract moisture, which can adversely affect the operation of a Microcontroller Unit (MCU). For instance, a typical microcontroller uses voltage levels between 0 and 5v, and if moisture or other conducting contaminants are present between an input pin and a 5v or ground pin, a short circuit is created. An unwanted path for current flow can cause unpredictable behavior, shorten operating lifetime, create a fire hazard, or kill electronics altogether.

Almost every component dissipates power in the form of heat. The heat that builds up beyond specified tolerances can degrade or destroy components. Contaminants can act as insulation on components or block air flow. PCB exposure to liquids, even aerosolized liquids, can cause corrosion on solder joints and circuit traces. Later on, corroded metallic parts can initiate impedance issues or open circuits. Despite the potential for PCB degradation over time, there’s a market for used PCBs. Used or scrap PCBs might be cost-effective for creating small prototype circuits, but they are usually polluted with dust, moisture, or flux and are more often tossed or recycled for metal recovery.

In any case, it’s worthwhile to either protect your PCBs (including computer motherboards) or check on them every few years and clean them if you need them to operate for many years. (You can easily create a filter for a chassis by securing a used dryer sheet over vent slots in a case, as long as the fan is robust enough to tolerate the extra pressure it has to work against. Never, ever use a vacuum cleaner on electronics, however.)

clean PCBs
Figure 1: Current path created by electrochemical path formation. The electrochemical migration of metal ions is the growth of conductive, metallic threads (dendrites) via an electrolytic solution, under the influence of a DC voltage bias.

Modern ICs generate more heat than older ICs. Heat increases with greater power consumption, and heat has become more of an issue as integrated chips have packed more circuits in the same amount of space, making ICs more vulnerable to insulating contaminants. Dust can be formed from a variety of organic and inorganic substances such as dirt, hair, plant pollen, clothes, and minerals.[i]

Why do you need flux?

When soldering a PCB, you need flux to “wet” the metal solder to make connections that facilitate metallurgical bonds. Flux also comes in various strengths that dissolve oxides that might have formed on traces, pins, or other metal surfaces that need to solidly connect to create a conductive path.  Rosin is a flux material that has been in long use, is made from tree sap, and is fine for use on new components. For repairing electronics or soldering on otherwise dirty PCBs, you can buy mildly activated rosin (RMA) or activated rosin (RA), both of which cut through built-up oxides but leave a residue that needs flux cleaner to end up with a clean PCB that does not attract contaminants. (RA is recommended for heavily oxidized or larger wires.)

Dust

PCBs can suffer from conductivity issues when residual flux from solder joints is left on a PCB. Dust gets attracted to and sticks to flux residues. Electrostatic charge from operating electronics also attracts particles. High-frequency signals, in particular, are affected by the cross-sectional area of a conductive path; therefore performance is affected by the width of conductive traces at high frequencies. Residual flux can be conducive to forming a conductive path, affecting circuit performance. According to the authors of the 2016 white paper Why Clean A No-Clean Flux, “Metal migration is dependent on PCB material composition, board surface roughness, concentration and distribution of residues and environmental conditions.”[ii] Flux residues can lead to electrochemical migration of metal ions and growth of connective metal “dendrites.” No-clean fluxes can leave a light residue that during PCB processing is light enough to evaporate (or outgas) when heat-activated. However, even a no-clean flux residue, if caught under a quad flat-pack IC upon reheat, can try to outgas with nowhere to go and form a bubble under the flat pack IC. Nevertheless, used properly, no-clean flux is reliable and safe.

Three ways to get dirty PCBs

PCBs get dirty enough to affect performance for three reasons: the PCBs are soldered or assembled in an unclean environment, residues are left on the boards after assembly, or finished PCBs are insufficiently protected from the environment during storage or operation.

Assembly in a clean environment is a factor

A clean environment where PCBs are first soldered is a factor in keeping electronics clean and working reliably for a long time. In a dirty environment, dust, particles, or other contaminants can stick to PCBs or get trapped in the solder and keep solid connections from forming, causing conductivity issues later. It is recommended to use soldering gloves, as sweaty fingers can affect PCB just as moisture does.

Please see Why Clean PCBs Matter, Part II for more on this topic.

References:

[i] http://content.time.com/time/health/article/0,8599,1966870,00.html
[ii] https://www.kester.com/LinkClick.aspx?fileticket=Xoh4bQ7bYkc%3D&portalid=0

Secure microcontroller delivers advanced cryptography in pint-sized package

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Manufacturers of security-sensitive industrial, consumer, computing and internet of things (IoT) devices now have a fast, efficient way to build in secure cryptographic operations, integrate key storage and enable active tamper detection with the MAX32558. As the newest member of the DeepCover family of secure microcontrollers from Maxim Integrated Products, Inc., the MAX32558 offers these robust security features while enabling designers to save up to 50 percent of printed circuit board (PCB) space versus the closest competitor.

As electronic products become smaller and increasingly connected, there is a growing threat to sensitive information and privacy, requiring manufacturers to keep security top of mind when designing their devices. While designers should prevent security breaches at the device level, they often struggle with the tradeoff of enhanced security with minimized board space, as well as the cost of design complexity and meeting time to market goals.

The MAX32558 DeepCover Arm Cortex-M3 flash-based secure microcontroller solves these challenges by delivering strong security in a small footprint while simplifying design integration and speeding time to market. It integrates several security features into a small package, including secure key storage, a secure bootloader, active tamper detection and secure cryptographic engines. It also supports multiple communications channels such as USB, serial peripheral interface (SPI), universal asynchronous receiver-transmitter (UART) and I2C, making it ideal for a wide range of applications. Maxim’s long-standing reputation and experience in payment terminal certifications as well as its established support and technology can help streamline the certification process for customers, reducing the process up to 6 months’ time (rather than the typical 12 to 18 months).

Key Advantages

  • Robust security:
    • Shields sensitive data by providing the most secure key storage available
    • Offers secure bootloader, active tamper detection and secure cryptographic engines
    • Compliant with Federal Information Processing Standard (FIPS) 140-2 L3&4 certification
  • Highly integrated solution in a small footprint:
    • Compared to a secure authenticator, the MAX32558 provides 30x more general-purpose input/output (GPIO) in the same PCB footprint (4.34mm x 4.34mm) wafer-level package (WLP). The closest competitor, meanwhile, offers a device with similar features but in a much larger package (8mm x 9mm ball-grid array 121 (BGA121))
    • Reduces footprint by embedding a number of security features to address point-of-sale Payment Card Industry (PCI) pin transaction security (PTS) requirements, as well as several analog interfaces
    • Provides 512KB of internal flash and 96KB of internal SRAM
  • Easy design integration:
    • Complete software framework including real-time operating system (RTOS) integration and code examples in evaluation kit
    • Code can be easily ported from one device to another as it shares the same API software library as the rest of the product family
    • Pre-certified Europay, Mastercard and Visa (EMV)-L1 stack for smartcard interface provided
    • Includes extensive documentation and code for managing the device lifecycle, such as secure firmware signing and device personalization

Commentary

  • “Maxim continues to bring together the functions and interfaces required to build new generations of devices which incorporate advanced features that consumers can trust with their personal data,” said Gregory Guez, executive director, Micros, Security and Software Business Unit at Maxim Integrated. “We have significantly shrunk the size of the MAX32558 microcontroller without compromising on our exceptional security features, saving valuable board real estate. Additionally, our deep security expertise speeds consumers’ time to market up to 6 months.”

Availability and Pricing

  • The MAX32558 is available at Maxim’s website for $3.80 (1000-up, FOB USA)
  • The MAX32558-KIT# evaluation kit is available

PCB layout guidelines and considerations

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A Printed Circuit Board (PCB) layout, in its most basic form, is a means to transfer a circuit from a breadboard to a more stable and permanent physical form. Whereas entire books and college coursework have been dedicated to PCB layout, what follows is a short overview of what to consider when making a PCB.

Schematics

Start by creating a great schematic, since the schematic is both the primary documentation and the map for understanding and constructing a system of circuits. A schematic is a diagram of circuits, components, and connections that are laid out in a manner that is easy to follow. Components and connections between components (or netnames) are clearly identified. A great schematic includes as much information as possible, including tolerances and sizes, notes on thermal issues, tuning procedures (if any), placement of critical components, information for a PCB (e.g., board stack up), recommendations on controlled impedance routing, component de-rating, and perhaps a sequence of operations (if the schematic is not already part of a manual). Notations on the schematic are encouraged. Do not assume that everyone who subsequently reads the schematic will know as much as you, or the same things as you do.

High-frequency signals

PCBs that support high-frequency signals have special requirements. Generally, you need not worry much about high-speed signals unless you are working with signals at or above 50 MHz. However, many of the interfaces we use today operate at higher than 50 MHz (e.g., USB), so some knowledge of how to avoid having issues with high-speed signals is warranted. PCB layout, especially at high frequencies, is all about the physics of the flow of electrons. Guidelines usually reflect common sense about how electrons behave at the board level. Visualize water flowing in a river basin through pinch points and around various formations of rocks, and you have an idea of how electric current will behave through traces, around obstructions, and through pinch points in your PCB layout. PCBs can have one or multiple layers of traces sandwiched in between glass-reinforced epoxy laminate material, and signals can interact between layers.

There is a tricky relationship between high-frequency signals and the length of traces or wires. The definition of high-speed is relative; wires begin to act as transmission lines as the frequency of the signals running through them increases. If the impedance of the trace is negligible compared to the load, you do not have a high-speed scenario. A trace becomes a transmission line when the length of the trace is larger than 1/3, 1/6, or even 1/10 of the signal’s sinusoidal wavelength, then you need to treat the trace as if it were a transmission line. The three figures are all given separately as “rules of thumb,” with 1/10 being the most conservative (presumably to account for the very high frequencies common today.)

Signal Routing and placing components

Know where signal and return currents will flow on the PCB for your high frequency and low-frequency signals. Keep digital signals as far away from analog signals as is feasible. Analog circuits are sensitive to digital signals, including the clock, which can introduce noise in the analog side of your system, so separate them and make sure signal paths, or current flows, do not cross. Figure 1, courtesy Analog Devices, shows an incorrect way to place analog and digital circuits on a PCB.

PCB layout
Figure 1: Component placement and signal routing: the wrong way. Do not place components so that analog signals are routed near, around, or through digital signal paths, both supply and return. (Image: Analog Devices, Inc.)

Figure 2 shows analog current flows (green arrows) that do not have to cross over current flows going on between digital circuitry (red arrows).

PCB layout
Figure 2: Component placement and signal routing: the CORRECT way. Digital circuits can introduce noise to analog circuits, so keep them separate from each other. (Image: Analog Devices, Inc.)

When you are designing a PCB, the layout and the length of transmission lines of high-speed signals matter. Keep traces as short as possible. Place components physically near the chips that they modify (e.g., pull-up resistors, bypass capacitors). Ground and power planes can provide shielding and if you have a simple PCB, they should be located on opposite sides of the PCB. (Think optimal flow patterns.)  Isolate signals using physical separation. Keep parallel traces short as well as traces running on adjacent layers short. Traces that run beside each other or on top of each other (on adjacent layers) can develop parasitic capacitance that results in crosstalk and coupling. If possible, run traces on adjacent layers orthogonal to each other. Remember the electrical relationship to magnetism, and that traces with current running through them create a magnetic field that varies with the signal.

Minimize crosstalk by increasing the distance between traces (or otherwise improve isolation), using guard traces, or by using differential signals to reduce electromagnetic interference. Increasing the distance between traces can be done by increasing board thickness or placing traces as far apart as possible. The smaller the trace or pad area, the lower the equivalent impedance for that area. Traces also have an inductive component, or an approximate trace or strip inductance. Unwanted physical phenomena that can develop, such as capacitance and inductance, can be further investigated in detail by studying the physics behind the relationship between electricity and magnetism. For instance, widening a trace will increase the capacitance of the trace, but it will reduce the inductance of the trace. This is one reason why PCB layout and simulation tools are essential, followed by testing a prototype PCB before attempting production in high volume.

Smaller packages actually do better with high-frequency signals than larger packages, from a PCB layout point-of-view. A compact layout will produce fewer parasitic components. Analog Devices has a “dedicated feedback” on some op amps, designed for making optimal PCB layout of an op amp easier. The dedicated feedback streamlines signal flow and lowers distortion. Analog Devices defines “dedicated feedback” as having placed the feedback pin directly adjacent to the inverting input pin of an op amp. Thus, the only requirement to connect the two pins is a very short trace or resistor rather than routing feedback around or underneath the amplifier.[i]

In addition to keeping trace lengths short, using bypass capacitors is essential. Capacitors need to be placed as close as physically possible to the power supply pins on ICs. Capacitors offer a means to buffer the rise and fall of changing voltage levels and are essential to good performance in high-speed circuits. A ground plane and a power plane are vital to reducing parasitics and noise. For a PCB with multiple layers, at least one layer should be dedicated to a ground plane. Be sure that you have analyzed the return path for current throughout the layout and in all directions. Dedicate as much space as possible to the ground plane, with traces that carry high-speed signals of particular significance in relationship to the ground plane for shielding. For multiple-layer PCBs, use several vias to connect (the same) ground planes together.

Both art and science

As technology has progressed, the frequency of signals, including digital signals, has become blazing fast. Understanding signal propagation has increasingly become a necessity for engineers. To understand why, an article by Dr. Howard Johnson, a high-speed circuit design professor, explains the need to close the gap in understanding between digital design and analog design. Both analog and digital disciplines overlap very noticeably at high speeds, yet have been taught for several decades as if separate worlds (at least to undergraduates). Read Why Johnny Can’t Design a High-Speed Digital System by Dr. Howard Johnson for a long view on some issues that face new engineers.[ii] Designing for a successful PCB layout can be straightforward (for a simple circuit), or an intense science covering several disciplines with a potential for extreme complexity. PCB layout can get complex when driven by product requirements (e.g., size), multiple layers, many and various components, and different types of signals (e.g., high-speed, low voltage, high voltage, digital, analog, etc.) that must successfully co-exist on the same board. Finally, regulations and environmental standards are also part of the PCB design process. Creating well-behaved PCBs is both a science and an art. This article barely scratches the surface, but perhaps it will equip you with an idea of areas that you need to investigate in-depth.

[i] http://www.analog.com/en/analog-dialogue/raqs/raq-issue-65.html

[ii] Find an affordable version of Dr. Johnson’s lecture series at safaribooksonline.com

RTL-to-GDSII design flow software gets optimization, industry-golden signoff tools

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design flow softwareSynopsys, Inc. unveiled its Fusion Technology that transforms the RTL-to-GDSII design flow with the fusion of best-in-class optimization and industry-golden signoff tools, enabling designers to accelerate the delivery of their next-generation designs with full-flow quality-of-results (QoR) and the fastest time-to-results (TTR). It redefines conventional EDA tool boundaries across synthesis, place-and-route and signoff, sharing engines across the industry’s premier digital design tools, and using a unique, Fusion data model for both logical and physical representation.

Fusion Technology enables one DNA backbone across the Synopsys Design Platform that includes IC Compiler II place-and-route, Design Compiler Graphical synthesis, PrimeTime signoff, StarRC extraction, IC Validator physical verification, DFTMAX test, TetraMAX II automatic test pattern generation (ATPG), SpyGlass DFT ADV RTL testability analysis, and Formality equivalence checking solutions. It provides Design Fusion, ECO Fusion, Signoff Fusion, and Test Fusion, resulting in the most predictable RTL-to-GDSII flow with the fewest iterations, as well as unsurpassed design frequency, power, and area.

The traditional RTL-to-GDSII design flow has clear lines of demarcation between synthesis, place-and-route, and signoff functions. These functional boundaries cause rework when transitioning from one design phase to the next, as the less-precise engines used early in the flow are replaced by more-precise engines closer to tapeout. Design iterations at the transition point between tools lead to degraded full-flow TTR and unmet power, performance, and area (PPA) targets.

Fusion Technology redefines conventional EDA tool boundaries and enables Design Fusion, ECO Fusion, Signoff Fusion, and Test Fusion. Design Fusion provides common engines between synthesis and place-and-route to enable convergence, and moves synthesis optimization technology into place-and-route, and place-and-route optimization technology into synthesis in order to enable best QoR. ECO Fusion drives faster signoff closure based on PrimeTime and StarRC golden signoff analysis inside implementation, improving flow predictability and eliminating ECO iterations. Signoff Fusion eliminates excessive design margin and overdesign, using the golden signoff backbone for both optimization and signoff, to enable perfect correlation, reduced pessimism, and superior QoR. Test Fusion is the combination of design-for-test RTL analysis and design-for-test synthesis integrated into implementation, enabling best QoR while reducing silicon test costs and turnaround time.

Learn more about Fusion Technology and the unique Design Fusion, ECO Fusion, Signoff Fusion, and Test Fusion capabilities in this whitepaper.

Early-adoption customers and our exclusive rail analysis partner, ANSYS, will discuss their experiences and results using Fusion Technology at the Synopsys Users Group(SNUG) Silicon Valley event, March 21-22, at the Santa Clara Convention Center in Santa Clara, Calif.

C/C++ Compiler now integrated into Eclipse-based e² studio IDE

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Renesas Electronics Corporation announced an enhancement to its e² studio integrated development environment (IDE) tool for the Renesas Synergy Platform. Through its ongoing partnership with IAR Systems, the leading embedded development tools supplier, Renesas Synergy customers can now enjoy significant performance benefits by integrating IAR Systems’ advanced IAR C/C++ Compiler into the Eclipse-based e² studio IDE.

Through its optimization technology, the IAR C/C++ Compiler can significantly reduce the application code, allowing developers to add more features to their Synergy microcontrollers (MCUs). The compiler’s industry-best execution speed for generated code is clearly documented in established speed benchmarks such as EEMBC® Coremark. Faster code execution speed enables an MCU to spend more time in low power modes to conserve battery life. Networked Internet of Things (IoT) devices use Synergy MCUs to monitor and/or control the surrounding environment and system components in home/building/industrial automation systems, home appliances, energy management systems, and healthcare and medical equipment.

Previously, e² studio users would build their applications using the standard GCC GNU compiler. This new collaboration with IAR Systems adds the option to use the IAR C/C++ Compiler directly from within e² studio, while keeping the existing option to use the proprietary IAR Embedded Workbench® for Renesas Synergy IDE. System developers can access instructions for integrating the compiler into the e² studio by downloading the latest version of the e² studio tool. Providing the IAR C/C++ Compiler as an option ensures the full potential of the Synergy Platform is unlocked regardless of IDE preference.

The Synergy Platform is the first qualified, maintained and fully supported software/hardware platform that accelerates time to market, reduces total cost of ownership and removes the obstacles engineers face designing IoT products. The Synergy Platform consists of fully integrated software, development tools and a wide range of scalable Arm Cortex-M based MCUs fully accessible through the software APIs. There are no upfront licensing fees or back-end royalties – everything is included in the purchase price of the MCU.