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Economical desktop computer based on Raspberry Pi

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Newark announced the availability of the new-to-market Raspberry Pi 400 desktop computer. Available in ready-to-use kit form, the competitively priced Raspberry Pi 400 is an ideal desktop computer for use in the home or education. Raspberry Pi 400 can also be purchased on its own for use in industrial and commercial applications including point-of-sale terminals and thin clients.

Raspberry Pi 400 kit integrates the keyboard and electronic components into a fully-enclosed compact unit and offers a clock speed of 1.8GHz, 20% higher than Raspberry Pi. The kitted variants comprise a Raspberry Pi 400, pre-programmed SD card, power supply, mouse, beginner’s guide, and micro HDMI cable; all that is required to start using Raspberry Pi 400 is a television monitor.

The Raspberry Pi 400 provides high performance and a rich feature, including a 28nm Broadcom BCM2711 quad-core ARM Cortex-A72 64-bit processor clocked at 1.8GHz, offering industry-leading performance and power efficiency; 4GB LPDDR4-3200 RAM, and a micro SD card slot for operating system, application, and data storage; dual-band 802.11ac wireless networking delivering real-world data rates of more than 100Mbps, Gigabit Ethernet, and Bluetooth 5.1. The two SuperSpeed USB 3.0 ports can be used to connect a wide range of peripherals; two micro-HDMI ports, supporting up to 4Kp60; customers can easily integrate Raspberry Pi 400 into embedded designs using the horizontal 40-Pin GPIO header

Raspberry Pi 400 is available in six keyboard languages for the UK, Germany, France, Italy, Spain, and North America.

Tiny, dual-antenna GPS/GNSS module provides accurate positioning and heading

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Septentrio expands its GNSS module portfolio with a mosaic-H heading receiver. With dual antenna capabilities, this surface mount module delivers reliable heading & pitch or heading & roll information on top of centimeter-level positioning. mosaic-H is the new addition to Septentrio’s existing mosaic module family, which already includes high-performance RTK and timing modules as well as modules with integrated GNSS corrections. Having a single standard footprint across multiple specialized receiver modules enables integrators to create multiple application-specific products based on a single design.

mosaic-HTM delivers orientation angles immediately from the start, helping initialize inertial systems that otherwise would require movement before they can measure 3D orientation. INS initialization with GNSS attitude from power-up allows machine trajectory path optimization and fully informed navigation of robotic systems immediately from mission start.

The mosaic-H receiver will be available for integrator testing and customer evaluation by end of December 2020. The full product production is expected by spring 2021.

FPGA family in ceramic quad flat pack option is QML-qualified

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Microchip Technology announced its RTG4 Field Programmable Gate Array (FPGA) family is the first in a Ceramic Quad Flat Pack (CQFP) option to achieve qualification to the industry’s Qualified Manufacturers List (QML). The achievement will enable space system developers to create systems using more reliable packages that simplify the layout and routing of Printed Circuit Boards (PCBs) that are also easier to assemble and inspect.
 
Microchip’s CQFP package with 352 pins for RTG4 FPGAs simplifies system design in applications ranging from satellites and space probes to planet landers and vehicles. The CQFP package option is easier to assemble than Ceramic Column Grid Array packages, further improving reliability while enabling a more cost-effective system integration alternative to higher-pin-count alternatives. It is ideal for control applications that do not require a high number of inputs/outputs (I/Os) or need frequent switching and a high number of temperature cycles. 
 
RTG4 FPGAs give space systems new high-speed signal-processing capabilities and leverage reprogrammable flash memory to provide greater immunity to configuration Single Event Upsets (SEUs) while consuming 40 to 50 percent less power than competing Static Random Access Memory (SRAM) FPGAs. RTG4 FPGAs feature 150,000 Logic Elements (LEs), 462 multipliers, and 5.2 megabits (Mb) of memory. With this qualification, Microchip is now able to offer a full range of qualification and screening options for RTG4 FPGAs in the CQFP package suitable for a wide range of space missions from class 1 applications that require QML-V components, to low-cost New Space constellations with relaxed screening requirements.
 

Open VPX backplanes designed for horizontal- mount enclosures

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Pixus Technologies has announced new OpenVPX backplanes designed for horizontal-mount enclosures. The horizontal-mount backplanes can be placed into 1U-4U tall 19” rackmount OpenVPX enclosures.  They provide enough space to have three 3U slots or one 3U and one 6U slot side-by-side.  So, a wide range of configurations and size options are available.  The backplanes are typically designed to support at least PCIe Gen3 speeds, but higher-speed options are offered.  Versions that accommodate VITA 66 (for optical) or VITA 67 (for RF) through the backplane and SOSA requirements are also optional.
Pixus offers OpenVPX backplane/chassis systems in commercial, development, and MIL rugged formats. 

Mounting base kit simplifies electronic prototyping tasks

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Digi-Key Electronics announced that it has expanded its product portfolio to include Phase Dock Inc.’s WorkBench project development kit. This distribution partnership is part of Digi-Key’s Marketplace initiative to broaden the product offerings now available for customers, making Digi-Key more of a one-stop-shop than ever before.

Phase Dock offers a unique project development kit series, the Phase Dock WorkBench, that helps engineers, makers, and students turbocharge prototyping and accelerate projects built with evaluation boards and breadboards. The kits improve productivity by speeding time to completion, greatly reducing work area clutter, and minimizing project setup time. The WorkBench can be used with many development boards, sensors, and actuators carried by Digi-Key.

The Phase Dock WorkBench eliminates many problems common to prototyping. It saves time previously lost constructing an ad hoc platform from cardboard, plywood, etc. It provides portability and protection to fragile hardware that otherwise might be loosely wired together on the desktop. And it allows engineers and hobbyists to dive into the heart of their projects more quickly, easily reconfigure working prototypes, and maintain an orderly work area at the same time.

For more information about Phase Dock and to order from their product portfolio, please visit the Digi-Key website.

Chip design software works with 3-nm gate-all-around process technology

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Synopsys, Inc. announced the release of the 3-nanometer (nm) gate-all-around (GAA) AMS Design Reference Flow, which provides designers a complete front-to-back design methodology for designing analog and mixed-signal circuits using the Synopsys Custom Design Platform. It has been optimized to provide maximum designer productivity for designers of advanced 5G, HPC, AI, and IoT applications using the Samsung 3nm GAA process technology.

Complexity at advanced nodes means designers are looking for new methods to shorten design cycles. Through close collaboration, Samsung and Synopsys provide a flow that is optimized to overcome design complexity and provide the best possible products for 3nm GAA design. Key features of the flow include in-design electromigration analysis, which shortens design closure time by providing accurate electromigration analysis before the layout is complete. It also includes Live design rule checking (DRC) with Synopsys’ IC Validator physical verification solution, enabling layout engineers to quickly check for design rule violations directly from the layout canvas as they work.

The AMS reference flow provides a proven methodology for designing at 3nm GAA process technology. This methodology, which has been validated by Samsung, includes a full set of documented flows and design examples. Covered topics include design entry, circuit simulation, Monte Carlo analysis, noise analysis, RF analysis, aging, and EM/IR analysis, parasitic simulation, layout, and signoff.

The Synopsys Custom Design Platform is based on the Custom Compiler design and layout environment and includes HSPICE circuit simulator, FineSim circuit simulator, CustomSim FastSPICE circuit simulator, Custom WaveView waveform display, StarRC parasitic extraction, and IC Validator physical verification. The platform features natively integrated StarRC extraction to provide early feedback on the impact of parasitics on circuit behavior, performance, and pioneering visually-assisted layout automation capabilities that simplify the creation of advanced-node layout.

PCIe boards carry accelerator ICs to speed AI inference for edge systems

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Flex Logix Technologies, Inc. announced the availability and roadmap of PCIe boards powered by the Flex Logix InferX X1 accelerator – the industry’s fastest and most efficient AI inference chip for edge systems.

The InferX X1P1 uses a single InferX X1 chip and a single LPDDR4x DRAM on a half-height, half-length PCIe board. Samples are available now to lead customers; general sampling will occur in Q1 and product availability in Q2 2021. The InferX X1P4 will have four InferX X1 chips on the same size board: half-height, half-length and will sample mid-2021 with production by end of 2021. Finally, an InferX M.2 board will be available in the same time frame as X1P4.

The InferX X1P4 will have throughput on YOLOv3, for object detection and recognition, similar to the Nvidia Tesla T4 at volume pricing from $649-$999. Other real customer models run faster on X1P4 than T4. The InferX X1P1 is about 1/3 the performance of Tesla T4 for YOLOv3 but sells for $399-$499. For some customer models, the X1P1 outperforms the T4. InferX M.2 pricing will be similar to the X1P1 and has the same performance.

The new InferX PCIe boards deliver higher throughput/$ for lower price point servers. Boards announced include the following: InferX X1P1 PCIe board – x4 PCIe GEN3/4 board featuring 19W TDP; InferX X1P4 PCIe board – This <75W TDP board is x8 PCIe GEN3/4; InferX X1M M.2 board – This 19W TDP board at M.2 22x80mm is an x4 PCIe GEN3/4

Flex Logix is also unveiling a suite of software tools to accompany the boards. This includes Compiler Flow from TensorFlowLite/ONNX models and a nnMAX Runtime Application. Also included in the software tools is an InferX X1 driver with external APIs designed for applications to easily configure & deploy models, as well as internal APIs for handling low-level functions designed to control & monitor the X1 board.

933MHz will be available in the second half of 2021.

Embedded FPGA IP works on 28-nm FD–SOI-based ICs

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QuickLogic Corporation announced the availability of its ArcticPro 3 embedded FPGA (eFPGA) IP, which is now available on Samsung’s 28nm FD–SOI process, enabling OEMs and semiconductor companies to seamlessly integrate the capability of discrete FD-SOI FPGAs into their own ASICs/SoCs, greatly optimizing system performance, power consumption and cost for Edge AI use cases in consumer, IoT, and automotive applications.

QuickLogic’s ArcticPro 3 eFPGA IP has been designed from the ground up on the Samsung 28FDS process, resulting in a significant boost in performance and delivering ultra-low standby current leakage. The 28FDS process supports body biasing, enabling OEMs and semiconductor companies the ability to “dial-in” the ideal performance/power consumption parameters to meet their system requirements.

The ArcticPro 3 IP is developed with a homogenous, reprogrammable fabric architecture based on SLCs (Super Logic Cells), which consist of eight LUT4 + Register blocks, and it uses a hierarchical routing scheme that strikes the optimum performance and power consumption balance needed for computation heavy, battery-powered or other power-sensitive products. In addition to the logic fabric, the eFPGA IP includes the option to integrate fixed function blocks such as embedded RAM and fracturable Multiply-Accumulate (MAC) blocks to efficiently implement hardware accelerators for neural networks and other computationally intensive circuits foundational in AI/ML applications. ArcticPro 3 is supported by QuickLogic’s proprietary tools as well as the ground-breaking QuickLogic Open Reconfigurable Computing (QORC) vendor-supported open source FPGA development tools, giving designers full control over their system software development environment.

Over the past three decades, QuickLogic’s eFPGA IP has been implemented in numerous SoCs, MCUs, and discrete FPGAs, and shipped in millions of units into multiple end markets such as consumer, IoT, military, and industrial.

QuickLogic’s ArcticPro 3 eFPGA technology on Samsung’s 28nm FD–SOI process is available now.

Development kit focuses on Arduino-based, LTE-powered IoT apps

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Telit announced the launch of Charlie, a turnkey innovation kit for fast, inexpensive development of Arduino-based, LTE-powered IoT applications. The new kit is the latest example of Telit’s commitment to providing makers and other innovators with low-cost development solutions as they explore the burgeoning IoT market opportunity.

Telit designed Charlie to provide all of the key features and capabilities necessary to leverage Arduino and LTE: The Telit ME310 module, based on the Qualcomm 9205 LTE modem, provides full coverage of NB-IoT and Cat M1 LTE bands, as well as a fallback to 2G in those areas where the new technologies are not fully deployed yet; The microprocessor is compatible with the Arduino Integrated Development Environment (IDE) and easily programmable through Arduino libraries; The board’s Arduino MKR form factor lets developers use a wide variety of Arduino shields; The ultra-low-power Bosch Sensortec BMA400 acceleration sensor and Qualcomm Technologies’ ultra-low-power Qualcomm 9205 LTE modem, are both ideal for applications such as asset tracking; The ceramic GNSS antenna with a low-noise amplifier (LNA) enables location-based applications; A battery charger, USB access, and cellular antenna connector provide additional design flexibility, capabilities, and efficiency.

SoM sports hardened 64-bit, multicore RISC-V MPU subsystem

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Sundance has launched PolarBerry, the first production and deployment-ready SoM with a hardened 64 bit, multicore real-time, Linux-capable RISC-V MPU subsystem to deliver an unparalleled combination of defense-grade security, low power consumption, and thermal efficiency for embedded systems development.

With Microchip Technology Inc.’s PolarFire SoC field-programmable gate array (FPGA) at its heart, providing a deterministic, coherent 64-bit RISC-V CPU cluster and a deterministic L2 memory subsystem enabling the implementation of secure Linux and real-time applications, PolarBerry is ideally suited to the development of embedded computing and real-time applications based on RISC-V processors as an alternative to ARM. Typical applications will be found in the defense/mil-aero, AI/ML, communications, automotive, industrial automation, and imaging markets as well as the Internet of Things.

PolarBerry’s compute engine delivers up to 50% lower power than alternative FPGAs, 250k logic elements (LEs), and features four high-speed, low-power transceivers from 250Mbps to 12.7Gbps. The PolarFire SoC FPGA’s power consumption is 12W maximum and power provided directly from the PolarBerry SoM to enable embedded solutions.

The PolarBerry SoM offers all the important attributes for strong SoC/FPGA design security including anti-cloning protection, device-level anti-tamper features, bitstream protection, key management, FPGA hardware access control, secure boot and physical memory protection (PMP) as well as supply chain assurance. It also features a 40 pin Raspberry Pi (RPI) interface to allow standalone operation and rapid application development by providing up to 26 GPIOs, 20 of which can be assigned to SPI, UART, CAN, or other interfaces. All RPI signals are 3.3V logic. Associated onboard PolarBerry SoM peripherals include 4GB of 32-bit wide DDR4 memory, 128MB SPI Serial NOR FLASH for storing the boot image, and programmable clocks to provide flexible clocking to the FPGA and high-speed transceivers. There is also an RJ45 Ethernet socket with a 100/1000Base-T interface, two CAN 2.0 physical layers, a JTAG interface for programming, and 4GB of eMMC non-volatile storage. Samtec connectors provide high-speed communication to a carrier board for powerful peripheral customization. The power consumption of the module is 16W with the power it can be applied via a PRI interface or carrier board.

The PolarBerry SoM measures just 55mm by 85mm and has an operational temperature range of 0°C and +70°C. It can also be installed on Sundance’s PCIe SoM carrier to provide access to an FMC and additional interfaces.

PolarBerry is part of Microchip Technology’s “Get Launched!” campaign and has been released now for early adaptors at a price of US$995 for delivery in January 2021. For more information about Microchip Technology’s “Get Launched!” campaign, visit https://www.crowdsupply.com/microchip/get-launched.