Design platform combines hardware emulation, FPGA prototyping technologies to accelerate verification cycles

Siemens Digital Industries Software unveiled its next-generation Veloce hardware-assisted verification system for the rapid verification of highly sophisticated, next-generation integrated circuit (IC) designs. This is the first complete, integrated offering that combines best-in-class virtual platform, hardware emulation, and Field Programmable Gate Array (FPGA) prototyping technologies and paves the way to leverage the latest powerful hardware-assisted verification methodologies.

Veloce HYCON (HYbrid CONfigurable) for virtual platform/software-enabled verification. Veloce HYCON delivers innovative technology that allows customers to engineer and deploy complex hybrid emulation systems for their next-generation system-on-chip (SoC) designs.

Veloce Strato+, a capacity upgrade to the Veloce Strato hardware emulator. With an industry-leading capacity roadmap that scales up to 15 billion gates, Veloce Strato+ combines the industry’s highest total throughput with its fastest co-model bandwidth and time-to-visibility.

Veloce Primo for enterprise-level FPGA prototyping, an internally developed enterprise prototyping solution that combines industry-leading runtime performance with exceptionally fast prototype bring-up.

Veloce proFPGA for desktop FPGA prototyping. With a modular approach to capacity, the Veloce proFPGA family of products delivers scalability across a range of capacity requirements.

This highly cohesive system sets a new standard for the future direction of hardware-assisted verification methodologies. The system takes hardware, software, and system verification to the next level of intelligent digitalization by streamlining and optimizing verification cycles while helping to reduce verification costs.

This seamless approach to managing verification cycles emphasizes running market-specific, real-world workloads, frameworks, and benchmarks early in the verification cycle for power and performance analysis. This enables customer-built virtual SoC models early in the cycle and the integration to begin running real-world firmware and software on Veloce Strato+ for deep-visibility to the lowest level of hardware. Customers can then move the same design to Veloce Primo to validate the software/hardware interfaces and execute application-level software while running closer to actual system speeds. To make this approach as efficient as possible, Veloce Strato+ and Veloce Primo use the same RTL, the same virtual verification environment, the same transactors and models to maximize the reuse of verification collateral, environment and test content. This is a necessary foundation for a seamless methodology.

Innovation in the chip, system, and software design enables Veloce Strato+ to deliver to the capacity roadmap published in 2017 when the Veloce Strato platform was introduced. The innovative design and manufacturing of the Crystal 3+—a new, proprietary 2.5D chip—increases system capacity by 1.5x over the previous Veloce Strato system. This innovation enables Veloce Strato+ to lead in the emulation market with a marketing-leading available capacity of 15B gates. This capacity, which is the largest effective capacity available today, is now in use at multiple Veloce Strato+ customers.

The Veloce Strato system is also expanding the list of qualified processors by adding the AMD EPYC 7003 series processor. These new processors are fully qualified to run with the Veloce Strato systems as run time hosts and co-model hosts.

Veloce Primo and Veloce proFPGA represent the industry’s most powerful and versatile approach to FPGA prototyping. The enterprise-level FPGA prototyping system, Veloce Primo, simultaneously delivers outstanding performance, with capacity scaling up to 320 FPGAs and a consistent working model with Veloce Strato in terms of software workloads, design models, and front-end compilation technology. This fundamental alignment between emulation and prototyping contributes to reducing the cost of verification by leveraging the right tool for the task where the emulation and the prototyping work together as complementary solutions for a better outcome in the shortest cycle. Veloce Primo also supports both virtual (emulation offload) and in-circuit-emulation (ICE) use models for the highest possible performance while maintaining accurate clock ratios in both modes.

Veloce proFPGA brings a proven, world-class desktop platform to the Veloce hardware-assisted verification system (via an OEM agreement with Pro Design). With a modular approach to capacity, the Veloce proFPGA family of products delivers scalability across a range of capacity requirements – from 40M gates to 800M gates – based on high-end FPGAs including Intel Stratix 10 GX 10M and Virtex UltraScale+ VU19P device.

The full Veloce Hardware-Assisted Verification system is now available and in production use at leading customers worldwide.