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Design tool offers easy-to-follow user experience

December 10, 2019 By Aimee Kalnoskas Leave a Comment

Lattice Semiconductor Corporation announced the availability of the latest version of its popular software design tool for FPGAs, Lattice Radiant 2.0. In addition to adding support for higher density devices like the new CrossLink-NX FPGA family, the updated design tool also offers new features that make it faster and easier than ever to develop Lattice FPGA-based designs.

When system developers evaluate hardware platforms, the actual hardware is only a part of their selection criteria. They also evaluate the design software used to configure the hardware for its ease-of-use and supported features, as these features can have a significant impact on overall system development time and cost.

New feature upgrades available in Radiant 2.0 include:

  • An on-chip debugging tool that allows users to conduct bug fixes in real time. The debugging feature lets developer insert virtual switches or LEDs in their code to confirm viability. The tool also lets users change hard IP block settings to test different operating modes.
  • Improved timing analysis provides more accurate trace and route planning and clock timing to avoid design congestion and thermal issues.
  • The engineering change order (ECO) editor lets developers make incremental changes to a completed design without having to recompile the entire FPGA database.
  • The Simultaneous Switching Output (SSO) calculator analyzes the signal integrity of individual pins to ensure their performance isn’t adversely affected by their proximity to another pin. 

You may also like:

  • Lattice Nexus
    Low-power FPGA platform targets high-growth applications

Filed Under: Applications, FPGA Tagged With: latticesemiconductor

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