Dual-DPLL timing module improves synchronization resilience

The MD-990-0011-B from Microchip is an M.2 timing module family for data center servers and 5G vRAN platforms, with compatibility for Intel Xeon 6 SoC server designs, automatic source selection and locking across GNSS, SyncE and PTP, and up to 8 hours of holdover during reference loss or network disruption. Built in an M.2 E-Key form factor, the modules support OCP NICs, PCIe NICs and server motherboards, and integrate dual DPLL clock channels, five low-jitter synthesizers, ePPS support, temperature monitoring and EEPROM-based board configuration for server and network timing applications.