Synopsys announced availability of the new embARC Machine Learning Inference software library to facilitate development of power-efficient neural network system-on-chip (SoC) designs incorporating Synopsys’ DesignWare ARC EM and HS DSP Processor IP. The embARC Machine Learning Inference (MLI) software library provides developers with optimized functions to implement neural network layer types, significantly reducing processor cycle counts for applications that require low power and area, such as voice detection, speech recognition, and sensor data processing. The embARC MLI software library is available through embARC.org, a dedicated website that provides software developers centralized access to free and open source software, drivers, operating systems, and middleware supporting ARC processors.
The embARC MLI software library supports ARC EMxD and HS4xD processors and provides a set of essential kernels for effective inference of small- or mid-sized machine learning models. It enables the efficient implementation of operations such as convolutions, long short-term memory (LSTM) cells, pooling, activation functions such as rectified linear units (ReLU), and data routing operations, including padding, transposing, and concatenation, while reducing power and memory footprint.
As an example, low-power neural network benchmarks such as CIFAR-10 running on an ARC EM9D processor can achieve up to a 4X reduction in cycle count compared to competitive processors in the same class. Additionally, the MLI library provides an average of 3-5X performance improvement across a wide range of neural network layers, such as depth-wise 2D convolution, fully connected, basic RNN cells, and LSTM cells with a maximum performance boost of up to 16X for 2D convolution layers.