Silex Insight is now extending its offering by launching a high throughput DDR encrypter (100Gbps). The DDR encrypter IP Core module enables on-the-fly encryption and authentication to the external memory. It is highly configurable and may be optimized for various sizes, throughput, and latency trade-offs. The core is device independent and is highly portable.
Many ASIC/FPGAs are now system-on-chip devices that contain an embedded processing hard-block. When data confidentiality is essential, it is necessary to protect the confidentiality of memory accesses performed by the processor. These accesses may be processor instruction fetches or general memory transactions. This IP core improves tamper resistance by avoiding any modification, spoofing, or analysis of external data. It comes with optional authentication and handles multi-region management. The IP core is highly configurable with the possibility of area/performance trade-offs.
It supports AXI slave/master interfaces, APB port for configuration purposes. It is typically placed between the processor(s) and an external memory controller (DDRx).
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