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IC design software gets better Spice circuit simulation for analog/mixed-signal work

October 25, 2018 By Aimee Kalnoskas Leave a Comment

Spice circuit simulationSynopsys announced that its Custom Design Platform has been enhanced with innovative new FineSim SPICE circuit simulation and Custom Compiler custom layout technologies to address the growing needs of accelerating robust analog/mixed-signal (AMS) designs at advanced process nodes and high-reliability applications. The new analog simulation technologies in the latest FineSim SPICE release provide 3X faster performance for large post-layout circuits and adds new RF-class analysis capabilities.

The 2018.09 release of Custom Compiler provides new Extraction Fusion technology with StarRC parasitic extraction and DRC Fusion technology with IC Validator signoff physical verification that enable tighter design/layout collaboration and fewer late-stage design iterations. Combined with enhancements in Custom Compiler’s visually-assisted automation technology, the Synopsys Custom Design Platform delivers new levels of design and layout productivity to accelerate AMS design.

Seagate and other industry leaders highlighted their experiences in achieving significant productivity gains by adopting the Synopsys Custom Design Platform at the 2018 Design Automation Conference (DAC). Videos of these presentations are available on the Synopsys web site.

The Synopsys Custom Design Platform is a unified suite of design and verification tools that accelerates the development of robust custom and AMS designs. Anchored by the Custom Compiler custom design environment, the platform features industry-leading circuit simulation performance, a fast, easy-to-use custom layout editor complemented with best-in-class technologies for parasitic extraction, reliability analysis, and physical verification.

Key features of the Custom Design Platform include reliability-aware verification, visually-assisted layout, and Extraction Fusion and DRC Fusion technologies. Reliability-aware verification ensures robust AMS design with signoff-accurate transistor-level EM/IR analysis, large-scale Monte Carlo simulation, aging analysis, and other verification checks. Visually-assisted automation is a pioneering approach to reducing layout effort, especially for advanced-node designs, that is proven to deliver 2-10X higher productivity. Extraction Fusion and DRC Fusion technologies shorten time to design closure and reduce late iterations.

 

Filed Under: microcontroller, Tools Tagged With: synopsysinc

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