Microsemi Corporation (Nasdaq: MSCC), a provider of semiconductor solutions differentiated by power, security, reliability and performance, announced three new devices in its portfolio of Synchronous Ethernet (SyncE) products, which include two single-channel ultralow jitter network synchronizers, ZL30621 and ZL30622, as well as a dual-channel version,ZL30623. The new network synchronizers offer communications customers G.8262 SyncE compliance, leveraging the company’s more than 25 years’ experience in telecommunications network synchronization. In addition, Microsemi announced the availability of its ZL30182, a dual-channel, high performance line card clock translator for SyncE and Optical Transport Network (OTN).
Microsemi’s new ZL30621, ZL30622 and ZL30623 provide jitter performance of 0.25 pico seconds (ps) root mean square (rms) and integrated electrically erasable programmable read-only memory (EEPROM) for self-configuration at start-up. The single-channel devices also feature a compact 5×5 millimeter (mm) package. Combined, these features allow Microsemi to offer compelling solutions for space-constrained, high volume applications.
“By offering these small, easy to use devices with excellent jitter performance and low cost, we can expand our customer reach, as well as the range of applications our products can support,” said Maamoun Seido, vice president and business unit manager of Microsemi’s timing products. “As the leader in packet timing, with deep expertise in SyncE and IEEE 1588, our ZL30621, ZL30622 and ZL30623 devices provide a cost-effective solution for SyncE applications requiring full compliance with the ITU-T G.8262 standard.”
Microsemi’s ZL30621, ZL30622 and ZL30623 are ideal for a wide range of SyncE network synchronization architectures, with target applications including small cell routers and switches, broadband access, carrier Ethernet equipment and wireless backhaul equipment. As the insatiable demand for bandwidth at the edge of the network grows, access equipment is coming under mounting pressure to provide increased bandwidth at a lower cost. Market research firm Infonetics is forecasting small cell backhaul equipment revenues to reach $2.5 billion by 2019 at a five-year compound annual growth rate (CAGR) of 86 percent.
The ultralow jitter network synchronizers are all fully compliant G.8262 Ethernet equipment slave clock (EEC) option 1 and option 2, and G.813 SDH equipment slave clock (SEC) network synchronizers. The ZL30621 and ZL30622 have three input references and generate up to three differential, or six single-ended output clocks, while the ZL30623 has six input references and generates up to six differential or 12 single-ended output clocks.
The ZL30621 and ZL30622 feature an integrated fractional-N analogue phase-locked loop (APLL) and the ZL30623 features a dual, independent fractional-N APLL. This generates ultralow jitter output clocks programmable to any frequency between from 1 hertz (Hz) to 1,035 megahertz (MHz). The devices’ integrated digital phase locked loops (DPLLs)provide G.8262 compliance with programmable loop bandwidths down to 0.1 Hz, hitless reference switching, holdover and jitter filtering.
About Microsemi’s New Dual-Channel, Ultralow Jitter Line Card Device
After winning the 2014 “Product of the Year” award from Electronic Product China for its single-channel line card device, ZL30169, Microsemi is announcing the availability of the dual-channel version of the device,ZL30182. The high performance ZL30182, with its six-input and six outputs, provides output clocks with jitter performance of 0.25 ps rms and targets applications requiring ultralow jitter and a wide frequency range to support both OTN as well as SyncE.
The device integrates dual, independent DPLLs, dual analog PLLs and EEPROM. With programmable loop bandwidth from 5 Hz to 500 Hz, the DPLL provides hitless reference switching, holdover and jitter filtering. These capabilities are necessary to ensure no phase hits are seen on the output of the line card clock, unlike the case with simple digital circuitry or APLL only implementations. The integrated APLLs generate the ultralow jitter output clocks programmable to any frequency from 1 Hz to 1,035 MHz. The integrated EEPROM provides up to four automatic self-configurations of the device at power-up.
Microsemi’s new ultralow jitter network synchronizers and line card device are available in volume production quantities now.