Synopsys, Inc. announced that it has added the ChaCha20 and Poly1305 (RFC7539) algorithms to its DesignWare Multipurpose Security Protocol Accelerator IP, enabling designers to efficiently implement the latest encryption and authentication functionality to protect their IoT system-on-chips (SoCs). The Security Protocol Accelerator IP increases security protocol performance by supporting efficient data sequencing as well as parallel processing of cryptographic operations such as authentication and encryption/decryption. With the addition of these algorithms to the Security Protocol Accelerator IP, designers can secure Internet communication applications that rely on the Transport Layer Security (TLS) protocol version 1.2 and 1.3, including browsers, voice-over-IP devices, and smart home applications.
The DesignWare Multipurpose Security Protocol Accelerator IP accelerates a broad range of computationally intensive cryptographic algorithms as required by most security protocols, such as SSL/TLS, IPsec, WiFi and LTE. The Security Protocol Accelerator IP’s advanced security features include Trusted Execution Environment (TEE) support, secure key access and differential power analysis countermeasures to increase protection against threats. The virtualization feature allows designers to share a single Security Protocol Accelerator instance across multiple host processors, or a multi-core processor, to offload security functionality for reduced gate count, small memory footprint, and simplified software management.
The DesignWare Multipurpose Security Protocol Accelerator IP with support for Chacha20 and Poly1305 is available today. Support for the ChaCha20 and Poly1305 algorithms is also available in Synopsys’ NIST-validated DesignWare Cryptography Software Library.