Tortuga Logic announced a partnership with Synopsys to offer a security verification solution that identifies and prevents vulnerabilities in system-on-chip (SoC) designs. The basis of the solution is the combination of security features built into Synopsys’ DesignWare ARC Processor IP and Radix-S, Tortuga Logic’s industry-leading security verification software.
Radix-S scans a system’s hardware and software during the pre-silicon design and simulation stages to detect potential system-level threats. Radix-S is made available with a set of security threat models that have been specifically optimized for ARC processors, allowing ARC licensees to efficiently verify whether their configuration or chip-level integration introduces any system security vulnerabilities into their ARC-based system.
Synopsys ARC Processor IP is a portfolio of highly configurable 32-bit CPUs whose power and area efficiencies have been optimized for a wide range of embedded applications. SoC designers can differentiate their products by configuring each ARC Processor to meet their specific performance and area requirements. The ARC portfolio includes the Enhanced Security Package for ARC EM and HS processors that help protect SoCs against both logical and physical attacks, as well as ARC SEM security cores with additional protections against side-channel attacks.
“Security is implementation dependent, so SoC designers need to ensure that the security features configured in their systems are not susceptible to external threats,” adds Dr. Jason Oberg, CEO of Tortuga Logic. “ARC processors have state-of-the-art security features, and Radix-S complements the IP with technology that can analyze SoCs built with an ARC core, including application software, to identify security vulnerabilities that may have been introduced when implementing the complete SoC.”
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