Arasan has released an all-new version of its MIPI DSI IP compliant with the DSI-2 v1.0 Specifications supporting C-PHY v2.0 speeds of up to 54.72Gbps operating at 8 Gbps (for 1channel) for FPGA designs. This IP is designed to meet FPGA timing limitations to run at slower frequencies at less than 200 Mhz while still […]
arasan
PHY IP handles USB 2.0 in a small footprint
Arasan announces the immediate availability of its 2nd generation of USB PHY for the USB 2.0 Specification. Arasan 2nd generation USB PHY is a result of its continual evolution over decades, resulting in this generation with ultra-low area and power specifically targeting IoT and Mobile Devices. The highest Priority has been paid to area optimization […]
CAN IP optimized for FPGA apps
Arasan announces the immediate availability of its 2’nd generation of CAN IP for the CAN 2.0 and CAN FD Specifications. The controllers have been rearchitected and upgraded to lower power consumption and area, which make them suitable for FPGA applications in addition to Arasan’s primary ASIC IP market. Although automobiles do not have stringent power requirements like […]
