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imperas

Test suites for RISC-V now available for high quality security applications

March 1, 2022 By Redding Traiger Leave a Comment

Imperas Software Ltd. announced the beta release of the ImperasDV architectural validation test suites for RISC-V Physical Memory Protection (PMP). The open standard ISA (Instruction Set Architecture) of RISC-V offers developers a wide range of standard extensions and options that support the design of an optimized processor while leveraging the ecosystem of compatibility. The RISC-V Privileged […]

Filed Under: Embedded, Memory, Products, RISC-V, Security, Tools Tagged With: imperas

Updated reference model now includes RISC-V P extension and test suites

July 19, 2021 By Redding Traiger Leave a Comment

Imperas Software Ltd. announces the latest updates to riscvOVPsimPlus with support for the near ratified P extension and architectural validation test suites. The P (or Packed SIMD/DSP) extension is a significant addition to the flexibility of the modular RISC-V ISA (Instruction Set Architecture); it supports real-time data processing applications as part of the main processor pipeline […]

Filed Under: Applications, Data centers, Reference designs, RISC-V, Software, Tools Tagged With: imperas

RISC-V reference models support processor verification

February 25, 2020 By Aimee Kalnoskas Leave a Comment

RISC-V reference models

Imperas Software Ltd., announced the latest enhancements to its range of RISC-V reference models and solutions to support processor verification, with the leading commercial SystemVerilog hardware design verification environments provided by Cadence, Mentor, Synopsys, and also the Metrics cloud-based tools. Working together with lead customers, industry groups and associations, and the Google Instruction Stream Generator […]

Filed Under: Embedded, RISC-V, Software, Tools Tagged With: imperas

Instruction set simulator (ISS) for Mi-V RISC-V soft CPUs

December 17, 2017 By Aimee Kalnoskas Leave a Comment

QML Class Q

Microsemi Corporation and Imperas Software Ltd. announced the Extendable Platform Kit for Microsemi Mi-V RISC-V soft central processing units (CPUs). The collaboration delivers the first commercially available instruction set simulator (ISS) for Microsemi’s Mi-V ecosystem, a program designed to increase adoption of Microsemi’s RISC-V soft CPU product family utilizing RISC-V open instruction set architectures (ISAs). “Building out the Mi-V RISC-V ecosystem with the Imperas […]

Filed Under: Aerospace and Defense, Applications, Industrial, Telecommunications Tagged With: imperas, microsemicorporation

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