Achronix Semiconductor Corporation announced availability of an optimized High-Level Synthesis (HLS) flow from its partner, Mentor, a Siemens business, for its FPGA technology products. The integrated development environment enables designers to quickly go from C++ to FPGA using Mentor’s Catapult HLS and Achronix’s ACE design tools. Initially used for 5G wireless applications to reduce the overall development […]
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Physical IC verification tool optimizes ASICs, SoCs
Mentor, a Siemens business, today announced Calibre® RealTime Digital – a new physical verification tool that works in concert with popular commercial place-and-route environments to ensure “Correct-by-Calibre” routing, and help design teams cut weeks off of IC signoff. Calibre RealTime Digital is the sister product to Mentor’s multi-award-winning Calibre RealTime Custom tool introduced in 2011 […]
Chip design tools now handle TSMC 5 and 7-nm FinFET IC processes
Mentor, a Siemens business, has announced that several tools in its Calibre nmPlatform and Analog FastSPICE (AFS) Platform have been certified by TSMC for the latest versions of TSMC’s 5nm FinFET and 7nm FinFET Plus processes. Mentor also announced it has updated its Calibre nmPlatform tools in support of TSMC’s Wafer-on-Wafer (WoW) stacking technology. These Mentor tools and TSMC’s […]
Emulation platform handles up to 1.25 billion gates for data center designs
Mentor, a Siemens business, today introduced the Veloce® StratoT, which expands the footprint choices and configuration options available from its Veloce Strato™ emulation platform family. The Veloce Strato platform is a third-generation, data-center friendly emulation platform, and the only emulation platform on the market with full scalability across both software and hardware. In addition, the […]
Chip design CAD software supports integrated fan-out advanced packaging, chip-on-wafer-on-substrate packaging technologies
Mentor, a Siemens business, today announced several enhancements to its Calibre® nmPlatform, Analog FastSPICE™ (AFS™) Platform, Xpedition® Package Integrator and Xpedition Package Designer tools in support of TSMC’s innovative InFO integrated fan-out advanced packaging and CoWoS® chip-on-wafer-on-substrate packaging technologies. The TSMC InFO and CoWoS 3D packaging technologies enable customers to mix multiple silicon dice on a single device and […]
Embedded Linux support for Zynq UltraScale+ MPSoCs
Mentor, a Siemens business, today announced an update to its market-leading embedded product portfolio with broad coverage for the Xilinx Zynq UltraScale+ MPSoC ZCU102 Evaluation Kit. This release provides developers with support for the unique combination of multicore processors on the MPSoC development platform with Mentor Embedded Linux, Nucleus RTOS, Mentor Embedded Hypervisor, Code Sourcery […]
RTOS meets stringent safety requirements of ARM Cortex-M4-based applications
Mentor, a Siemens business, today announced ARM® Cortex®-M4 processor support from the Mentor® Embedded Nucleus® SafetyCert real time operating system (RTOS), targeting high-performance, next-generation safety-critical systems for industrial, medical, automotive and airborne markets. Combining high performance, low power, and cost-efficiency, the ARM Cortex-M4 processor is ideal for a diverse array of vertical market segments, including those […]
Autonomous driving platform eliminates pre-processing MCUs, meets SAE Level 5
Mentor, a Siemens business, today introduced the DRS360 platform – a comprehensive automated driving solution featuring breakthrough technology that captures, fuses and utilizes raw data in real time from a wide range of sensing modalities, including radar, LIDAR, vision and other sensors. The DRS360 platform delivers dramatic improvements in latency reduction, sensing accuracy and overall […]
Emulation platform speeds verification of complex networking chips
Mentor Graphics Corp. has announced a collaboration with Ixia, a leading provider of network testing, visibility, and security solutions. As a result, Mentor is integrating Ixia’s virtual edition test product family – IxNetwork Virtual Edition (VE) – with theMentor Veloce emulation platform to accelerate the verification of complex networking chips. As part of this collaboration, […]
Emulation platform bolsters SoC verification abilities
Mentor Graphics Corp. has ushered in a new era of emulation by announcing new applications for the Veloce emulation platform. The new Veloce Apps—Veloce Deterministic ICE, Veloce DFT and Veloce FastPath—overcome critical system-level verification challenges in complex SoC and system designs. They run on an upgraded Veloce OS3 operating system that significantly accelerates design compile cycles, gate-level […]