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synopsysinc

High-performance 64-bit ARC processor IP boosts performance by 3X

April 8, 2020 By Aimee Kalnoskas Leave a Comment

64-bit ARC processor

Synopsys announced the new DesignWare ARC HS5x and HS6x processor IP families for high-performance embedded applications. The 32-bit ARC HS5x and 64-bit HS6x processors, available in single-core and multicore versions, are implementations of a new superscalar ARCv3 Instruction Set Architecture (ISA) and deliver up to 8750 DMIPS per core in 16-nm process technologies under typical conditions, making them […]

Filed Under: 64-bit, Embedded, Hardware, Microprocessor Tagged With: synopsysinc

Chip design software promotes high-throughput camera and display SoC development

April 1, 2020 By Aimee Kalnoskas Leave a Comment

MIPI C-PHY/D-PHY IP

Synopsys announced it is expanding its MIPI camera and display IP portfolio with the DesignWare MIPI C-PHY/D-PHY IP for a range of FinFET processes. The silicon-proven C-PHY/D-PHY IP is compliant with the MIPI C-PHY v1.2 and D-PHY v2.1 specifications for a low-risk solution targeting high-resolution imaging and display SoCs. In addition, the C-PHY/D-PHY meets the stringent functional […]

Filed Under: SoC, Software Tagged With: synopsysinc

Ethernet 800G Verification IP targets next-generation networking systems

March 24, 2020 By Aimee Kalnoskas Leave a Comment

 Synopsys, Inc. announced the availability of the industry’s first verification IP (VIP) and Universal Verification Methodology (UVM) source code test suite for Ethernet 800G. As the requirements for increased bandwidth to support video-on-demand, social networking and cloud services continues to rise, Synopsys VC VIP for Ethernet 800G, based on the Ethernet Technology Consortium (ETC) specification, enables […]

Filed Under: Software, Tools Tagged With: synopsysinc

Physically aware RTL design system halves SoC implementation cycle

March 17, 2020 By Aimee Kalnoskas Leave a Comment

RTL Architect

Synopsys announced the immediate availability of RTL Architect, an innovative product that signifies a shift-left for RTL design closure. Synopsys RTL Architect is the industry’s first physically aware RTL design system, which reduces the SoC implementation cycle in half and delivers superior quality-of-results (QoR). RTL teams are increasingly faced with the challenges of rapidly exploring […]

Filed Under: Software, Tools Tagged With: synopsysinc

Security testing software development tool analyzes open source, proprietary code

March 3, 2020 By Aimee Kalnoskas Leave a Comment

Code Sight IDE plugin

Synopsys, Inc. announced that on Feb. 18 it will release a major update to the Polaris Software Integrity Platform to extend its static application security testing (SAST) and software composition analysis (SCA) capabilities to the developer’s desktop through the native integration of the Code Sight IDE plugin. These capabilities, the first of their kind, will enable […]

Filed Under: Applications, Security, Software Tagged With: synopsysinc

Software development platform reduces noise, reduces memory footprint in SoC designs

March 2, 2020 By Aimee Kalnoskas Leave a Comment

VC SpyGlass RTL Static Signoff software platform

Synopsys announced general availability of the VC SpyGlass RTL Static Signoff platform, part of the Synopsys Verification Continuum platform, which builds on the proven SpyGlass technology. The VC SpyGlass platform with multi-core support increases performance by 3X with half the memory footprint. The next-generation platform is enhanced with machine learning technology to reduce noise by […]

Filed Under: Software, Tools Tagged With: synopsysinc

HBM2E PHY IP operates at 3.2 Gbps

March 1, 2020 By Aimee Kalnoskas Leave a Comment

HBM2E PHY IP

Synopsys announced it has delivered silicon-proven HB M2E PHY IP operating at 3.2 gigabits per second (Gbps), addressing high throughput requirements of advanced graphics, high-performance computing and networking SoCs. Verified on TSMC’s Chip-on-Wafer-on-Substrate (CoWoS) advanced packaging technology, Synopsys’ DesignWare HBM2E PHY IP offers a micro-bump array that adheres to the JEDEC HBM2E SDRAM standard for the […]

Filed Under: Software, Tools Tagged With: synopsysinc

Ultra-low bandwidth wireless IoT platform combines processor, hardware accelerators, dedicated peripherals, RF interface

February 14, 2020 By Aimee Kalnoskas Leave a Comment

launched its new DesignWare® ARC® IoT Communications IP Subsystem, an integrated hardware and software solution that combines Synopsys' DSP-enhanced ARC EM11D processor, hardware accelerators, dedicated peripherals, and RF interface to deliver efficient DSP performance for ultra-low bandwidth wireless IoT (NB-IoT) applications, such as machine to machine communication. The ARC IP Subsystem includes SPI and GPIO for RF control and UARTs for logging and host control. The digital front end (DFE) offers a flexible interface to third party RF solutions, such as Palma Ceia's Release 14-compliant NB-IoT transceiver. The ARC IP Subsystem also contains a base software communications library, peripheral drivers, and application examples. The ARC IP Subsystem delivers the performance efficiency needed for a wide range of IoT applications including smart city, smart agriculture, and industrial automation. "Smart IoT applications demand the robust and reliable data transfer with low power consumption to increase battery life," said Roy E. Jewell, chief executive officer of Palma Ceia SemiDesign. "The combination of Palma Ceia SemiDesign's LTE Cat NB1/NB2 Release 14 RF transceiver with Synopsys' ARC IoT Communications IP Subsystem provides designers with an efficient end-to-end solution for the rapid deployment of their wireless NB-IoT applications." The integrated, ultra-low power ARC EM11D processor combines RISC and DSP capabilities for a flexible architecture that quickly adapts to rapidly changing wireless standards. The EM11D's zero-latency XY memory architecture implements instruction level parallelism and single-cycle 16+16 MAC operations for power-efficient data processing. Dedicated hardware accelerators for Viterbi decoding and trigonometric functions provide performance boosts for LTE NB-IoT algorithms while keeping processor frequency requirements to a minimum. Power management, critical to efficient IoT communications, is supported by an on-board power management unit, enabling up to six independent power domains and three unique power modes to support LTE Power Saving Mode (PSM) and Extended Discontinuous Reception (eDRX) modes. The ARC IoT Communications IP Subsystem includes a baseline communications library, which provides a critical foundation for NB-IoT functions, such as symbol interpolation, FFTs, modulation, and data manipulation. The application examples demonstrate use-cases in a typical Orthogonal Frequency-Division Multiplexing (OFDM) processing chain. The subsystem is supported by Synopsys' DesignWare ARC MetaWare Toolkit, which includes a rich library of DSP functions, allowing software engineers to rapidly implement algorithms from standard DSP building blocks. "Emerging NB-IoT applications require extremely low-power and low-cost implementations that can quickly adapt to evolving wireless standards," said John Koeter, senior vice president of marketing for IP at Synopsys. "Synopsys' DesignWare ARC IoT Communications IP Subsystem with Palma Ceia SemiDesign's RF Transceiver provide a complete hardware and software solution, enabling designers to efficiently incorporate key NB-IoT communication functionality into their IoT devices with significantly less risk and effort." Availability and Resources The DesignWare ARC IoT Communications IP Subsystem is available now from Synopsys PCS's LTE Cat NB1/NB2 Release 14 RF transceiver is available now from Palma Ceia SemiDesign. Learn more at: https://www.pcsemi.com/products/nb-iot/ About DesignWare IP

Synopsys launched its new DesignWare ARC IoT Communications IP Subsystem, an integrated hardware and software solution that combines Synopsys’ DSP-enhanced ARC EM11D processor, hardware accelerators, dedicated peripherals, and RF interface to deliver efficient DSP performance for ultra-low bandwidth wireless IoT (NB-IoT) applications, such as machine to machine communication. The ARC IP Subsystem includes SPI and […]

Filed Under: Applications, IoT, Software Tagged With: synopsysinc

Dev kit accelerates high-performance SoC development

January 27, 2020 By Aimee Kalnoskas Leave a Comment

Synopsys announced availability of the DesignWare ARC HS4x/4xD  Development Kit to accelerate software development for the ARC HS4x/4xD family of high-performance processor IP. The ARC HS4x/4xD Development Kit is a ready-to-use software development platform with support for the Linux kernel and access to the embARC open-source software packages on the embARC website, enabling designers to start software […]

Filed Under: Development Kits, Tools Tagged With: synopsysinc

BLE audio codec targets power-sensitive audio/voice apps

January 15, 2020 By Aimee Kalnoskas Leave a Comment

Bluetooth LE Audio LC3 Codec

Synopsys announced the availability of the Bluetooth LE Audio LC3 Codec optimized for Synopsys’ DesignWare ARC EM DSP and HS DSP processor IP. The LC3 codec is an important feature of Bluetooth LE Audio, the soon-to-be-released next-generation audio standard defined by the Bluetooth Special Interest Group (SIG) that enables system-on-chip (SoC) designers to efficiently implement […]

Filed Under: Applications, Codecs, Wireless Tagged With: synopsysinc

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