UltraSoC announced a significant extension of its embedded analytics architecture, allowing designers and innovators to incorporate powerful data-driven features into their products. Developers in the automotive, storage and high-performance computing industries can now integrate even more sophisticated hardware-based security, safety and performance tuning capabilities within their products, as well as reaping substantial time-to-market and cost […]
Lockstep monitor supports any processor architecture or subsystem
UltraSoC has launched the UltraSoC Lockstep Monitor, a hardware-based, scalable solution that helps functional safety significantly by checking that the cores at the heart of a critical system are operating reliably, safely and securely. UltraSoC’s flexible IP supports all common lockstep / redundancy architectures, including full dual-redundant lockstep, split/lock, master/checker, and voting with any number […]
IDE provides actionable insights for SoC development and debug
UltraSoC today announced UltraDevelop 2, a complete integrated development environment (IDE) that combines comprehensive debug, run control, and performance tuning with advanced visualization and data science capabilities for system-on-chip (SoC) development teams. Incorporating technology from UltraSoC partners Imperas and Percepio, UltraDevelop 2 provides actionable insights to dramatically cut development costs, shorten time-to-revenue and improve product […]
Debug probes support RISC-V, Arm and other CPU platforms
UltraSoC announced that it has partnered with SEGGER to offer support for J-Link debug probes within UltraSoC’s integrated system on chip (SoC) monitoring and analytics environment. SEGGER’s J-Link probes are amongst the industry’s most widely-used and support the debug of popular processor platforms including RISC-V, and both current and legacy Arm cores. The partnership gives SoC developers […]
Embedded analytics platform for design and debug of real-time systems
Embedded software systems – which are at the heart of a variety of electronic products from lightweight IoT sensors to high-performance computing (HPC) platforms – are prone to sporadic errors that can be hard to spot and virtually impossible to predict or to prevent from reoccurring. At the same time, traditional chip design requires the […]
Debug and trace technology added to open-source RISC-V CPU platform
SiFive, the first fabless provider of customized, open-source-enabled semiconductors, today announced that UltraSoC will provide debug and trace technology for the SiFive Freedom platform, based on the RISC-V open source processor specification as part of the DesignShare initiative. UltraSoC’s embedded analytics IP will be available through the recently announced SiFive DesignShare ecosystem that gives any […]
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