Clock synthesizer keeps jitter ultralow from 2 MHz to 2,7 GHz

Linear Technology Corporation announces the LTC6951, a low phase noise integer-N synthesizer with an integrated VCO and an ultralow jitter clock distribution section, ideal for clocking data converters. The LTC6951 features four high performance current mode logic (CML) outputs, each equipped with an independent low noise clock divider and digital delay block to cover a wide frequency range between 1.95MHz and 2700MHz. With a total of 115fsRMS absolute jitter (SNR method), the LTC6951 delivers the low jitter clocks necessary to achieve the best SNR when clocking data converters with high input frequencies and fast output data rates.

The LTC6951 introduces three intelligent schemes to simplify output clock expansion and the creation of large clock trees employed in systems with multiple daughter cards or with a large number of data converters. Linear Technology’s proprietary EZSync output synchronization method guarantees repeatable and deterministic phase relationships between all clock divider outputs on the LTC6951 and accompanying EZSync supporting devices. The ParallelSync multichip parallel synchronization feature allows the outputs of multiple LTC6951 ICs to be retimed to the common reference clock. This permits reference aligned synchronization in the reference clock domain with easy-to-meet nanosecond range setup and hold time requirements. The EZ204Sync JESD204B subclass 1 compliant synchronization method builds on the previous two approaches and enables the generation of the SYSREF and DEVCLK signals essential to this JEDEC standard across multiple parallel connected LTC6951 ICs along with any other EZSync compatible clock devices.

Linear Technology
linear.com