FPGA-based acceleration for OpenCL, C, and C++ development environments

Xilinx, Inc. has announced they will be enabling FPGA-based acceleration within the SuperVessel OpenPOWER development cloud. Development of performance demanding applications including big data analytics and machine learning is enabled by the Xilinx SDAccel Development Environment, hosted in SuperVessel. SDAccel allows application developers to describe their algorithms in OpenCL, C, and C++  and compile directly to Xilinx FPGA-based acceleration boards. The hosted environment will make FPGA-based application development faster and more accessible to a broad global community of developers.

SuperVessel is a first-of-its-kind open access cloud service that acts as a virtual R&D engine for application developers, system designers, and academic researchers to create, test and pilot solutions for emerging applications including deep analytics, machine learning and the Internet of Things. The Xilinx SDAccel Development Environment is a complete software-defined Integrated Development Environment (IDE) that enables developers to compile, profile, debug and deploy FPGA-based acceleration. The combination of the SuperVessel, IBM POWER architecture, SDAccel Development Environment, and Xilinx FPGA accelerator boards provides application developers with a high throughput, high availability cloud based platform to develop and execute compute intensive applications.

 

Xilinx
xilinx.com