Synopsys, Inc. announced availability of DesignWare® ARC® EM Safety Island IP, dual-core lockstep processors that simplify development of safety-critical applications and accelerate ISO 26262 certification of automotive system-on-chips (SoCs). The new Automotive Safety Integrity Level (ASIL) D Ready certified DesignWare ARC EM4SI, EM6SI, EM5DSI and EM7DSI processors integrate a self-checking safety monitor as well as hardware safety features such as error correcting code (ECC) and a programmable watchdog timer to help detect system failures and runtime faults. The ARC EM Safety Islands are supported by comprehensive safety documentation, including failure modes, effects and diagnostic analysis (FMEDA) reports that facilitate chip- and system-level ISO 26262 ASIL D compliance. In addition, the ASIL D Ready certified ARC MetaWare Development Toolkit for Safety eases the development, debugging and optimization of ISO 26262-compliant software targeting ARC processors. The ARC EM Safety Islands are designed to meet the area and safety requirements of a broad range of automotive applications including advanced driver assistance systems (ADAS), radar and sensors.
“Eliminating single points of failure in safety-critical SoCs is paramount to achieving ASIL D certification,” said Wolfgang Ruf, product manager, semiconductors at SGS-TÜV Saar GmbH. “By using Synopsys’ pre-verified ASIL D Ready certified ARC EM Safety Islands, designers can significantly reduce the development effort and time needed to achieve ISO 26262 certification for their automotive SoCs.”
The DesignWare ARC EM Safety Islands are configurable and extendable to meet the unique performance, power and area requirements of each target application. The ARC EM4SI is a dual-core lockstep processor solution based on the 32-bit ultra-compact ARC EM4 processor with single-cycle closely coupled memories. The ARC EM5DSI, based on the ARC EM5D processor, adds more than 150 DSP instructions and a unified multiply/MAC unit to accelerate signal processing algorithms. The ARC EM6SI and ARC EM7DSI offer the same functionality as the EM4SI and EM5DSI, respectively, and include up to 32 KB of instruction and data caches. The ARC EM Safety Islands include a range of safety-related features including:
- Self-checking safety monitor to ensure lockstep operation
- ECC logic to identify and correct data and address errors on closely coupled memories
- Hardware stack protection checks for overflow and underflow of reserved stack space to prevent data corruption and program crashes
- Integrated watchdog timer to help recover from a deadlock situation and enable countermeasures in case of tampering
The safety monitor also includes time diversity with parity to protect system integrity if noise pulses hit both cores simultaneously. Options to the ARC EM Safety Islands include a floating point unit (FPU), a microDMA controller as well as a memory protection unit (MPU) to help protect against malicious or misbehaving code in critical applications. These options are tightly coupled to each processor core to provide redundancy and further reduce single points of failure in the SoC. The cores in an ARC EM Safety Island can also operate in an independent dual-core mode to provide additional performance in applications that do not require lockstep execution, such as those targeting ASIL B safety standards.
The DesignWare ARC MetaWare Development Toolkit for Safety enables developers to generate and debug highly efficient code for deeply embedded applications with an optimizing compiler, debugger and instruction set simulator. The MetaWare compiler toolchain is ASIL D Ready certified and includes a safety manual and a safety guide to help developers meet the requirements of the ISO 26262 standard and prepare for compliance testing of their safety-critical systems. The ARC EM Safety Islands have been fully validated with fault injection testing using Synopsys’ functional safety verification tools, including Certitude® qualification and VCS® simulation, reducing verification time and effort. Verification also includes random fault coverage to ISO 26262 ASIL D levels.
“Advancements in connected vehicles are requiring automotive designers to incorporate sophisticated processor solutions that not only address performance and power, but also safety,” said John Koeter, vice president of marketing for IP at Synopsys. “Synopsys’ new ASIL D Ready certified ARC EM Safety Islands integrate specific hardware safety features to help designers meet the most stringent ISO 26262 requirements and accelerate development of their automotive SoCs.”
The ARC EM4SI and EM5DSI Safety Islands and the MetaWare Development Toolkit for Safety are available now. The ARC EM6SI and EM7DSI Safety Islands will be available in Q2, 2017.
Leave a Reply