On the eve of Embedded World in Nuremberg, Germany, Synopsys announced the new Virtualizer Native Execution on Arm-based hardware, which is designed to transform software development for edge devices by accelerating virtual prototype execution and deployment. It provides capabilities to improve engineering team productivity when building software-defined products in the automotive, high-performance computing (HPC), and […]
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DSP 128 & 256-bit IP designs feature low power consumption
To address the broader range of power, performance, and area (PPA) demands of embedded applications, Synopsys, Inc. announced it has expanded its DesignWare ARC Processor IP portfolio with new 128-bit ARC VPX2 and 256-bit ARC VPX3 DSP Processors. Based on the same VLIW/SIMD architecture as the company’s higher-performance 512-bit ARC VPX5 DSP processor, the new […]
Silicon design kit optimized for high-bandwidth memory/PCIe/ethernet connectivity
Synopsys, Inc. announced its collaboration with GLOBALFOUNDRIES to develop a broad portfolio of DesignWare IP for GF’s 12LP+ FinFET solution, including USB4/3.2/DPTX/3.0/2.0, PCIe 5.0/4.0/2.1, die-to-die HBI and 112G USR/XSR, 112G Ethernet, DDR5/4, LPDDR5/4/4X, MIPI M-PHY, Analog-to-Digital Converter, and one-time programmable (OTP) non-volatile memory (NVM) IP. The DesignWare IP is optimized to meet the high-bandwidth memory throughput […]
IC design software offers BIST, repair, and diagnostic capabilities for embedded MRAM-based designs
Synopsys announced that the DesignWare STAR Memory System solution offers new memory built-in self-test (BIST), repair, and diagnostic capabilities for embedded MRAM (eMRAM)-based designs, with initial support for GLOBALFOUNDRIES (GF) eMRAM on the 22FDX process. The STAR Memory System’s new algorithms target failure mechanisms of embedded MRAM and other types of non-volatile memories during production and in-field test. […]
AI-enabled app leverages machine learning algorithms
Synopsys, Inc. announced a state-of-the-art artificial intelligence (AI) enabled formal verification app, Regression Mode Accelerator, as part of the Synopsys VC Formal solution. This VC Formal app leverages state-of-the-art machine learning algorithms to deliver 10X speed-up in formal property verification during the design and verification cycle. Along with significant performance speed-up, use of this app accelerates […]
Security testing tool detects more vulnerabilities
Synopsys, Inc. announced the availability of several new product features that enable developers to build secure applications faster. The latest Coverity release, recognized by Gartner and Forrester as a leading static application security testing (SAST) tool, features seamless integration with Synopsys’ completely rebuilt eLearning platform, an on-demand security training solution for developers. The integration provides developers with convenient access—directly from […]
ASIL D-Ready embedded vision processor IP targets ADAS applications and self-driving vehicles
Synopsys, Inc. announced its new automotive safety integrity level (ASIL) B-, C-, and D- Ready DesignWare EV6x Embedded Vision Processors with Safety Enhancement Package (SEP) to accelerate the development of automotive system-on-chips (SoCs). The EV6x Processors with SEP include differentiated hardware safety features, safety monitors, and lockstep capabilities for safety-critical designs. These features enable designers to achieve […]
Desktop system handles mid-range SoC prototyping
Synopsys, Inc. announced the availability of its HAPS-80 Desktop (HAPS-80D) system for mid-range system-on-chip (SoC) prototyping. The Synopsys HAPS-80D system builds on the HAPS-80 prototyping family, with more than 1,500 systems deployed. HAPS-80D delivers out-of-the-box high-performance prototyping with built-in interfaces for immediate design interaction to accelerate software development and system validation. “Maxio Technology develops […]
RTL-to-GDSII design flow software gets optimization, industry-golden signoff tools
Synopsys, Inc. unveiled its Fusion Technology that transforms the RTL-to-GDSII design flow with the fusion of best-in-class optimization and industry-golden signoff tools, enabling designers to accelerate the delivery of their next-generation designs with full-flow quality-of-results (QoR) and the fastest time-to-results (TTR). It redefines conventional EDA tool boundaries across synthesis, place-and-route and signoff, sharing engines across […]
Circuit simulators target FinFET process IC designs
Synopsys Inc. announced release of the latest versions of its circuit simulation and custom design products—HSPICE, FineSim SPICE, and CustomSim simulators and the Custom Compiler IC design tool—to address the growing need for robust custom design. The growth in automotive electronics and transition to FinFET process nodes have led to a significant increase in IC […]
