Lattice Semiconductor Corporation announced major performance and design flow enhancements for its award-winning Lattice sensAI solutions stack. The Lattice sensAI stack provides a comprehensive hardware and software solution for implementing low power (1mW-1W), always-on artificial intelligence (AI) functionality in smart devices operating at the edge. Additionally, enhancements to the stack’s memory schemes address a key […]
Digital-twin simulation includes auto hardware/software sub-systems, full vehicle models, sensor data, traffic flows and more
Siemens has introduced the PAVE360 pre-silicon autonomous validation environment — a program established to enable and accelerate the development of innovative autonomous vehicle platforms. PAVE360 provides a comprehensive environment for multi-supplier collaboration across the automotive ecosystem for the development of next-generation automotive chips. PAVE360 also extends digital twin simulation beyond processors to include automotive hardware […]
Software verifies NVDIMM-P DDR5/4 memory designs
Synopsys, Inc. announced the availability of the industry’s first verification IP (VIP) for Non-Volatile Dual In-line Memory Module (NVDIMM-P) for DDR5/4. NVDIMM-P is the next-generation storage-class memory for enterprise applications ranging from big data, storage, and in-memory databases, to real-time processing; with challenging requirements of performance, security, and endurance, as well as persistence, reliability, and […]
LoRa software building blocks simplify IoT device development and deployments
Semtech Corporation announced the release of LoRa Basics, software building blocks to assist solution developers in quickly realizing the return on investment (ROI) their customers want. All LoRa Basics releases will be available on Semtech’s LoRa Developer Portal as open source. “To get LoRa-based solutions to market faster, developers can leverage Semtech’s free, supported and […]
Trace visualization tool includes FreeRTOS stack analysis, interval details
Percepio announces the release of Tracealyzer version 4.3. The new version has new features for state machine analysis, stack usage analysis for Amazon FreeRTOS and major performance improvements when working with large traces. “This is a major step in the Tracealyzer evolution,” says Percepio CEO Dr. Johan Kraft. “For instance, the new Interval Details view […]
Security verification package makes SoCs more bullet-proof
Tortuga Logic announced a partnership with Synopsys to offer a security verification solution that identifies and prevents vulnerabilities in system-on-chip (SoC) designs. The basis of the solution is the combination of security features built into Synopsys’ DesignWare ARC Processor IP and Radix-S, Tortuga Logic’s industry-leading security verification software. Radix-S scans a system’s hardware and software […]
GUI for advanced inertial measurement units simplifies custom motion-sensing designs
STMicroelectronics’ Unico GUI greatly simplifies configuring the finite state machine and machine learning core (FSM and MLC) logic of its latest Inertial Measurement Units (IMU), including the recently announced LSM6DSO and LSM6DSOX 6-axis modules. The FSM logic lets users run gesture and motion-recognition algorithms directly in the sensor for always-on convenience and low power consumption. The MLC […]
RTL synthesizer delivers faster run times, better-quality power and timing M
Synopsys announced the availability of Design Compiler NXT, the latest innovation in the Design Compiler family of RTL synthesis products. Early adopters have deployed the new technologies in their design flows and are realizing faster runtimes and very tight correlation with Synopsys’ IC Compiler II place-and-route system, leading to shorter, more convergent design cycles. In […]
Machine Learning Inference software facilitates neural network SoC dev
Synopsys announced the availability of the new embARC Machine Learning Inference software library to facilitate development of power-efficient neural network system-on-chip (SoC) designs incorporating Synopsys’ DesignWare ARC EM and HS DSP Processor IP. The embARC Machine Learning Inference (MLI) software library provides developers with optimized functions to implement neural network layer types, significantly reducing processor cycle […]
System design and analysis tackles electromagnetic challenges
Cadence Design Systems, Inc. entered the fast-growing system analysis and design market with the announcement of the Cadence Clarity 3D Solver, which delivers high accuracy with up to 10X faster simulation performance and unbounded capacity compared to legacy field solver technology. Harnessing state-of-the-art distributed multiprocessing technology, the Clarity 3D Solver efficiently tackles electromagnetic (EM) challenges […]
@MicroContrlTips
EE World Online
YouTube
Instagram