SoC

SOC design software features verification planning, memory-aware debug and performance analysis

November 11, 2020 By Redding Traiger Leave a Comment

Synopsys, Inc. announced the availability of the industry’s first Verification IP (VIP) for Compute Express Link (CXL) 2.0 designed for breakthrough performance in data-intensive system-on-chips (SoCs). CXL is the next-generation open standard interconnect that enables an ecosystem for high-speed communication between the CPU and workload accelerators, such as GPUs, FPGAs, and other purpose-built accelerator solutions, as well as memory expansion devices. The technology is built upon the well-established PCI Express infrastructure, leveraging the PCI Express 5.0 physical and electrical interface.

Synopsys VIP for CXL uses next-generation native SystemVerilog Universal Verification Methodology (UVM) architecture that enables ease of integration within existing verification environments and speeds up simulation performance allowing users to run a greater number of tests and accelerate time to the first test. VIP for CXL is natively integrated with Synopsys Verdi Protocol and Performance Analyzer and includes built-in coverage and verification plans for faster verification closure. In addition, Synopsys’ silicon-proven DesignWare CXL IP delivers an x16 link for maximum bandwidth with low latency, supporting all three CXL protocols (CXL.io, CXL.cache, CXL.mem) and device types to meet specific application requirements.

The CXL 2.0 protocol comes with an increased fan-out, pooling feature set for both physical layer and application layers. New features supported by CXL 2.0 are CXL switching and support for multiple logical devices (MLD); IDE (security) for both CXL.io & CXL.cache/mem; Ability to negotiate CXL 2.0 devices during APN phase and hotplug, CXL enumeration to view CXL device as PCI Express endpoint; Updates for system-level manageability through QoS telemetry, function level reset, global persistent flush, memory interleaving, and compliance test assertions

Synopsys VC VIP for CXL 2.0/1.1 is available today. DesignWare CXL IP Solution is also available now. For more information, visit VC Verification IP for CXL and DesignWare CXL IP

Automotive reference flow streamlines SoC design for ISO 26262 compliance

October 15, 2020 By Redding Traiger Leave a Comment

Synopsys, Inc. and Samsung Foundry announced the release of a validated automotive reference flow to streamline SoC hardware design for in-system test, implementation, verification, timing, and physical signoff for ISO 26262 compliance. This reference flow is targeted for automotive safety integrity level (ASIL) D autonomous driving and advanced driver-assistance systems (ADAS) applications. In close collaboration with Samsung, the optimized Synopsys automotive reference flow provides SoC architects, designers, and verification engineers with complete differentiated design and IP solutions that deliver complex functional safety (FuSa) analysis, implementation, and verification capabilities. The automotive reference flow utilizes Synopsys’ comprehensive automotive design flow and ASIL D-compliant functional safety processor IP.

ISO 26262 compliance complicates predictable execution of the automotive SoC project, by necessitating manual time-consuming flows which lack scalability, incur significant work overhead, and consume limited machine resources. These challenges drive project managers and designers to adopt new methodologies to reduce resource requirements, minimize manual tasks, and improve the quality of results (QoR). Through close collaboration, Samsung Foundry and Synopsys delivered a comprehensive automotive reference flow optimized to provide the best possible productivity and QoR.

Synopsys’ comprehensive automotive design flow includes unified functional safety verification and native automotive solutions, enabling designers to prove at the planning and implementation phases that their chip safety architecture can achieve target ASILs. Designers can perform FMEA and FMEDA with best-in-class technologies for unified fault campaign management. As part of the shift-left approach introduced by Synopsys, early functional safety analysis at RTL or gate-level can quickly identify candidates for triple-mode redundancy (TMR) and dual-core lock-step (DCLS) redundancy and estimate metrics for target ASIL. Synopsys offers the industry’s first self-test solution instantiated directly into the RTL that tolerates indeterminate digital states while rapidly achieving high fault coverage. Synopsys’ native automotive solutions based on FuSa intent provide the industry’s most comprehensive feature set to implement FuSa mechanisms, such as TMR, DCLS, and Finite State Machine (FSM), perform formal verification, and check and report that safety mechanisms are properly implemented. Comprehensive digital/analog fault injection and simulation can be performed to produce reliable metrics for FMEDA and roll-up. Synopsys solutions are independently ISO 26262 certified to accelerate the deployment and qualification process for ASIL D designs.

The Synopsys functional safety processor integrates hardware safety features, such as redundant processors, error-correcting code (ECC), parity protection, safety monitors, and user-programmable windowed watchdog timers, to detect system errors. Comprehensive documentation related to safety, including enhanced-safety manuals, FMEDA, and design failure modes and effects analysis (DFMEA) reports accelerating SoC-level functional safety assessments. The processor is supported by Synopsys’ ASIL D-compliant toolkit, helping software developers accelerate the development of ISO 26262-compliant codes. In addition, Synopsys offers a broad portfolio of an automotive-grade interface, processor, and foundation IP that can help designers achieve high levels of functional safety, security, and reliability.

Bluetooth 5.2-certified SoC extends range, throughput, reliability and security

October 8, 2020 By Redding Traiger Leave a Comment

STMicroelectronics has revealed its latest BlueNRG-LP Bluetooth LE System-on-Chip (SoC), which leverages the latest Bluetooth features to increase communication range, raise throughput, strengthen security, and save power. The ultra-low-power radio is optimized to consume as little as 3.4mA in receive mode, just 4.3mA when transmitting, and less than 500nA quietly waiting for wake-up events, cutting by half the size of battery needed in most applications and prolonging runtime.

BlueNRG-LP, the 3^rd-generation Bluetooth SoC from ST, is the world’s first Bluetooth LE 5.2-certified SoC to support concurrent connections up to 128 nodes, enabling seamless low-latency control and monitoring large numbers of connected devices, for instance from a stylish and intuitive smartphone app.

Combined with high RF-output power, which is programmable up to +8dBm, and excellent RF sensitivity of up to -104dBm, the BlueNRG-LP radio SoC can now natively cover a much larger area in beacons, smart lighting, gaming, building automation, industrial and tracking applications. Furthermore, the communication range can be extended without limit by seamlessly adding Bluetooth LE Mesh, now fully certified and available as part of the comprehensive BlueNRG software and hardware ecosystem.

In addition, BlueNRG-LP supports Bluetooth Long Range mode, which uses coded physical layers (Coded PHY) with Forward Error Connection (FEC) to extend radio-communication range up to hundreds of meters and increase reliability, as well as GATT (generic attribute) caching to connect quickly and efficiently.

BlueNRG-LP comes with ST’s third-generation Bluetooth Low Energy protocol stack certified to Core Specification 5.2 and designed to match its ultra-low-power architecture. The stack is provided as a free-of-charge and compiler-independent linkable library supported by multiple Integrated Development Environments (IDEs) and is optimized for small footprint, modularity, low latency, interoperability, and lifetime over-the-air upgradability. It supports features such as extended advertising and scanning, high-duty-cycle non-connectable advertising, extended packet length, and 2Mbit/s throughput.

In addition, BlueNRG-LP supports L2CAP Connection-Oriented Channel (CoC), which eases large bidirectional data transfers, multi-role simultaneous connectivity, and Channel Selection Algorithm #2 (CSA #2), which permits robust connections in noisy environments such as home, building, or industrial networks.

Enhanced security mechanisms included in the integrated Arm Cortex-M0+ microcontroller (MCU) comprise a secure bootloader, readout protection for the entire 256KB embedded flash, a 48-bit unique ID, as well as customer key storage, true Random-Number Generator (RNG), hardware public-key accelerator (PKA), and a 128-bit AES cryptographic co-processor. The highly efficient processing unit executes code at up to 64MHz, consuming an amazingly tiny 18µA/MHz, and features industry-standard digital interfaces, multi-channel 12-bit ADC, an analog microphone interface with a programmable gain amplifier, user and system timers and watchdog, and up to 31 5V-tolerant user-programmable I/O pins.

The BlueNRG-LP SoC also integrates an embedded RF balun, DC/DC converter, and capacitors for the HSE (High-Speed External) oscillator and internal low-speed ring oscillator, minimizing bill-of-materials (BOM) costs and simplifying circuit design.

BlueNRG-LP is available in a choice of 5mm x 5mm QFN32, 6mm x 6mm QFN48, and a miniature 3.14mm x 3.14mm WLCSP49 wafer-level package. With 32KB or 64KB RAM and a choice of temperature range up to 85°C or 105°C, designers get extra flexibility to choose a configuration that best meets their needs. The devices are covered by ST’s 10-year industrial longevity commitment, assuring users of long-term parts availability.

BlueNRG-LP SoCs are in production now, in QFN48, priced from below $1.00 for volume orders.

Low-powered ARM-based SoC MCUs target battery operated apps

September 16, 2020 By Aimee Kalnoskas Leave a Comment

Ambiq is introducing the new Ambiq Apollo4 SoC family. The Apollo4 SoC family is the fourth generation system processor solution built upon Ambiq’s proprietary Subthreshold Power-Optimized Technology (SPOT) platform. The Apollo4’s complete hardware and software solution enables the battery-powered endpoint devices of tomorrow to achieve a higher level of intelligence without sacrificing battery life. The Apollo4 enables manufacturers to create leading-edge endpoint devices leveraging the unique SPOT platform with Ambiq’s easy-to-use, rich peripheral set. The Apollo4 is available now with CSP and BGA offerings, as well as an Apollo4 Blue with Bluetooth LE.

The Apollo4 is purpose-built to serve as both an application processor and a coprocessor for battery-powered endpoint devices, including smartwatches, children’s watches, fitness bands, animal trackers, far-field voice remotes, predictive health and maintenance devices, smart security devices, and smart home devices.

With up to 2MB of MRAM and 1.8MB of SRAM, the Apollo4 has enough compute and storage to handle complex algorithms and neural networks while displaying vibrant, crystal-clear, and smooth graphics. If additional memory is required, external memory is supported through Ambiq’s multi-bit SPI and e.MMC interfaces.

For more product information, please visit www.ambiq.com

SoC prototyping system includes 300 M gates

September 8, 2020 By Aimee Kalnoskas Leave a Comment

S2C introduces the new Quad 10M Prodigy Logic System equipped with four Stratix 10 GX 10M FPGA devices. Stratix 10 GX 10M FPGA is the world’s largest capacity FPGA device with 10.2M Logic Elements, 253Mb M20K memory, and 3,456 DSP blocks. Quad 10M Prodigy Logic System is an astounding 300 million equivalent ASIC gate prototyping solution with attractive cost-per-gate pricing.

Large capacity and scalability with 40.8M Logic Elements, 1,012Mb memory and 13,824 DSP blocks
4,608 high-performance I/Os for inter FPGA connections and daughter cards
160 high-speed transceivers that can run up to 16Gbps
Compatible with 90+ Prodigy Prototype Ready IPs
Integrated Multi-Debug Module
Compact, sleek, all-in-one chassis for clean, portable, and well-organized work environment

The increasing scale of SoC design demands a greater FPGA prototyping capacity in pre-silicon verifications. The Quad 10M Prodigy Logic System is equipped with four Intel 10M FPGA devices in a single chassis with unified power and control module. The newly designed control module has built-in debug hardware to enable high-performance deep trace capability for multiple FPGAs without extra peripherals. Enhanced partitioning tools can perform automatic intra-FPGA partition with DIB insertion between 10M dies and inter-FPGA partition using pin multiplexing over multiple FPGAs. The elegant systems design creates the fusion of complexity and easy-to-use.

The Quad 10M Prodigy Logic Systems work seamlessly with other Prodigy prototyping components such as Prodigy Player Pro software, Prodigy Multi-Debug Module and Prodigy ProtoBridge to provide unrivaled configuration, partitioning, deep-trace debug and co-modeling capabilities.

The Quad 10M Prodigy Logic System is available for purchase now.

SoC design software helps ID systemic errors early in development

July 17, 2020 By Aimee Kalnoskas Leave a Comment

To help integrated circuit (IC) designers achieve design closure faster, Mentor, a Siemens business, today announced the extension of their powerful Calibre Recon technology to the Calibre nmLVS circuit verification platform. Introduced last year as an extension to Mentor’s Calibre nmDRC suite, the Calibre Recon technology is designed to enable customers to rapidly, automatically and accurately analyze IC designs for errors during early-stage verification design iterations, enabling significantly shortened design cycles and faster time to market.

The Calibre nmLVS-Recon solution helps speed overall circuit verification turnaround time by helping system-on-chip (SoC) engineers, circuit designers, and IC circuit verification teams identify and resolve selected systemic errors early in the development phase. These types of violations can consume valuable compute resources and potentially generate millions of error results, many of which are due solely to the incomplete status of the design. Early adopter customers leveraging the Calibre nmLVS-Recon solution realized more than 10x runtime improvements and 3x less memory requirements when analyzing early-stage designs.

The Calibre nmLVS-Recon technology is based on a flexible configuration framework that enables multiple-use models, allowing design teams to select and analyze specific classes of circuit verification issues. The tool features automated, intelligent execution heuristics engineered to help users seamlessly navigate between a complete Calibre nmLVS signoff flow and Calibre Recon selected circuit verification checks. With advanced options for data partitioning, design breakdown, data reuse, task distribution, and error management, the Calibre nmLVS-Recon flow can be used with any foundry/integrated device manufacturer’s (IDM) Calibre sign-off design kit “as is”, and on any process technology node.

Early design versions typically contain many gross systemic violations. For example, a “shorted nets” class of violation generates millions of errors and is very compute-intensive. Circuit verification engineers can use the Calibre nmLVS-Recon short isolation configuration to interactively and iteratively find and fix these types of violations quickly and efficiently. This option is built-in, allowing optimal flexibility and variation in the design analysis intent, while maintaining ease of use and seamless use model transition.

The Calibre nmLVS-Recon initial offering will be available to the market with the Calibre family release in July of 2020, with planned additional capabilities in later releases.

Graphics display SoC mirrors laptop or Android screens without downloading a driver

June 9, 2020 By Aimee Kalnoskas Leave a Comment

Silicon Motion Technology Corporation announced the launch of the SM768 graphics display SoC with InstantView Driverless Docking Technology, a newly patented ground-breaking technology that lets users mirror the screen of any laptop or Android phone to display presentations without downloading a driver.

Silicon Motion developed InstantView to provide an ease-of-use solution that simplifies the process of mirroring a PC or handset screen on a large presentation display using USB ports. With the newly introduced SM768 with InstantView, users no longer need to download additional drivers to mirror their screens, alleviating the frustrating and often confusing limitations corporate IT departments place on downloading and loading non-compliant software. InstantView also brings the benefit of improving productivity for people working or studying from home. And the supported dual-display capability makes group video conference more intuitive and efficient.

InstantView is fast, versatile and easy to use. InstantView works with any laptop USB port (USB-C/A) or Android phone USB-C/micro/mini port to dock and mirror their screen for display. When a device is docked, the InstantView app pops up automatically, and users can start (and stop) mirroring from their device with a single click. The app works with standard or guest users without requiring administrator rights. It also supports regular docking mode with driver and extended displays.

SM768 Product features include:

Supports dual displays, up to 4K Ultra High Definition
Support any laptop and Android device with any USB port
Content Adaptive Technology (CAT) hardware codec for high-efficiency display, reducing CPU loading by up to 70%
Smooth 4K video playback and low latency
Low power Display SoC
On-chip DRAM options for small form factor designs and reduced system BOM cost

In addition to the consumers and workplace, SM768 with InstantView technology is an optimal solution for educators and hospitality workers. In today’s modern classroom, teachers need to display their laptops on their screen constantly. Additionally, students often need to display their work during presentations to their peers. With InstantView, teachers and students can display instantly, without the need for a specific type of computer or driver installation on any laptop – making the presentation process smoother. Hotel owners recognize travelers are requiring more advanced in-room smart TV and tablet technology as travelers want to display their laptop screen on a TV or larger monitor, but all too often this is a technical challenge. InstantView driverless docking technology allows users to display from any laptop, without tedious driver installation for on- the-go displaying.

Low-power SoCs simplify WiFi designs

June 9, 2020 By Aimee Kalnoskas Leave a Comment

InnoPhase announces the INP1010 and INP1011 Talaria TWO modules. The products are complete solutions with wireless connectivity plus integrated microcontroller for edge of network IoT designs. The Talaria TWO’s unique digital polar radio architecture makes the modules the world’s lowest power Wi-Fi solution. Now engineers can focus on the value-added aspects of their design while still being able to take advantage of the ultra-low power wireless connectivity, processing capability and robust security features of the embedded Talaria TWO system on a chip (SoC).

InnoPhase incorporated the Talaria TWO SoC, recipient of a CES 2020 Innovation Award, into the INP1010 and INP1011 modules to meet the growing demand for ease of integration, simpler designs and faster time to market. The highly integrated, multi-protocol single-chip platform includes Wi-Fi and BLE for wireless data transfer, an embedded Arm Cortex-M3 for system control and user applications, plus advanced security elements for device safeguards. The modules can operate in stand-alone mode, in conjunction with an external MCU or in a hybrid mode where the system control and processing responsibilities are shared between the module and an external MCU. The integrated solution is ideally suited for battery-based, direct-to-cloud devices in smart home automation and commercial applications such as smart door locks, remote security cameras, and connected sensors.

The modules come complete with the necessary clocks, passives, and antennas and are certified with the Wi-Fi Alliance, Bluetooth SIG, FCC, IC (Canada) and awaiting CE approval. The INP1010 contains a printed PCB antenna and the INP1011, a U.FL antenna connector. The modules and associated development kits are available today through Mouser Electronics.

SoC handles 5G tasks on smartphones

May 20, 2020 By Aimee Kalnoskas Leave a Comment

MediaTek today announced the Dimensity 820 system-on-chip (SoC) which is optimized for premium user experiences. The Dimensity 820 delivers ultra-fast 5G speeds, and is feature-packed with MediaTek’s latest multimedia, AI and imaging innovations.

Dimensity 820 packs high performance Arm Mali G57 GPU graphics plus HyperEngine 2.0 enhancements so users can immerse themselves in the latest mobile games. Brands can embrace support for 120Hz high frame-rate displays, while leading HDR features with MediaTek MiraVision showcases the most vivid visuals in videos and streams.

MediaTek’s Dimensity 820 integrates a 5G NR (sub-6GHz) modem into this single-chip solution with MediaTek’s 5G UltraSave technologies, including exclusive 5G UltraSave Network Environment Detection and 5G UltraSave OTA Content Awareness, that altogether provides best-in-class energy efficiency. The 5G modem design also uses dynamic bandwidth part (BWP) adaption and connected mode discontinuous reception (C-DRX) power-saving technologies.

5G Carrier Aggregation (CA) technology delivers higher average speeds and a seamless handover between two 5G connection areas for the most reliable connectivity on the go. The Dimensity 820 also supports dual SIM, dual standby (DSDS) 5G technology for access to the fastest speeds and Voice over New Radio (VoNR) services on both SIMs.

The MediaTek Dimensity 820 includes:

Dedicated APU 3.0 (AI Processing Unit): MediaTek APU 3.0 provides more powerful AI-camera capabilities so users can capture stunning images and videos at the same time, without any quality loss.
HyperEngine 2.0 gaming technologies: MediaTek’s HyperEngine 2.0 provides whole smartphone enhancements for gaming. Combined with the chipset’s premium five-core GPU it delivers a superb gaming experience with optimizations that reduce network latency for smoother gameplay, support faster response times and enhance display quality. HyperEngine 2.0 also intelligently adjusts the CPU, GPU and memory resources to optimize power and performance.
MediaTek’s Imagiq 5.0: The flagship-class, HDR-native image signal processor (ISP) supports up to four concurrent cameras and up to 80MP sensors, giving brands more design flexibility.
Multi-frame 4K Video HDR: Easily to record stunning 4K HDR video even in bright and dark environments. The chip automatically captures frames at different exposures and intelligently fuses them into a single video stream, all in real-time.

The Dimensity 820 delivers best in class 5G experiences and is designed for global sub-6GHz 5G networks in Asia, North America, and Europe.

SDK adds accurate distance measurement capabilities to BLE SoCs for covid distancing needs

May 18, 2020 By Aimee Kalnoskas Leave a Comment

Dialog Semiconductor plc announced a new Wireless Ranging (WiRa) Software Development Kit (SDK) that adds highly accurate and reliable distance measurement capabilities to its DA1469x family of BLE SoCs.

The need for more accurate and reliable distance measurement and tracing technology has become even more critical in the wake of COVID-19. With businesses across the globe planning a controlled reopening of their workplaces, they are looking for solutions that will help guarantee safe distances between employees and improved contact tracing capabilities, to ensure safe working environments and peace of mind for employees.

Current Bluetooth low energy market solutions for distance measurement and positioning are based on measuring the strength or power of the received radio signal, known as Received Signal Strength Indicator (RSSI) measurements. However, these received power measurements may be inherently flawed due to the sensitivity of objects in the radio path blocking or reflecting the radio signals.

Dialog’s new Wireless Ranging SDK succeeds where RSSI falls short, leveraging a proprietary radar-like implementation for highly improved distance measurement accuracy between BLE connected devices. By interweaving Bluetooth LE data packets with constant tone frequency exchanges, the DA1469x on-chip 2.4 GHz radio generates the signals needed for phase-based ranging. The high-resolution on-chip sampling of radio waves provides high-quality IQ samples that form the input for distance determination. Data processing algorithms filter the data for noise, interference, and reflections, to produce the shortest over-the-air signal path length as an accurate distance output.

The BLE compliant stack and WiRa™ software implementation that Dialog offers does not require hardware adaptations or an external host processor, ensuring co-existence between the Bluetooth communication and the distance measurement process.

SoC