PICMG announces that the MicroTCA Working Group is working on the next generation of the MTCA architecture specifications initially launched in 2006. Efforts target improvements for time-sensitive and high bandwidth applications such as in high-energy physics. Current work includes accommodations for the next generation of CPUs and FPGAs that will natively support PCIe gen 5. […]
FPGA
FPGA prototyping software features multi-FPGA support
S2C announced the release of its enriched prototyping software dubbed Prodigy Player Pro-7. The new software suite breaks out Player Pro-RunTime, to strengthen prototype platform control and hardware test for its high-capacity platforms; Player Pro-CompileTime, to enhance the automation of multi-FPGA partitioning and pre/post-partition timing analysis; and Player Pro-DebugTime, to improve the efficiency of multi-FPGA debug probing and trace […]
Disaggregated, flexible eFPGA chiplet template furthers economical system designs
The industry’s first disaggregated eFPGA-enabled chiplet template solution is based on QuickLogic’s Australis eFPGA IP Generator and industry-leading chiplet interfaces from eTopus. The template delivers unprecedented design flexibility and bandwidth for high-performance applications. Unlike discrete FPGAs with pre-determined resources of FPGA LUTs, RAM, and I/Os, the disaggregated eFPGA-enabled chiplet template will be available initially as […]
SRAM PUF-based security IP protects Intel FPGAs
Intrinsic announced the immediate availability of its SRAM PUF-based hardware IP “QuiddiKey for Intel FPGAs”. QuiddiKey for Intel FPGAs is device-level security IP that comes pre-integrated as part of the security infrastructure of several Intel FPGA families. It creates a more secure platform by providing access to Intrinsic ID’s SRAM PUF technology on the FPGAs. […]
Lossless data compression software features low memory use
emCompress-PRO, a new all-in-one compression software from SEGGER, comes with all industry-standard compression algorithms. The software is designed to handle any compression task in any application, fulfilling requirements such as low memory usage, high speed, and on-the-fly processing. emCompress-PRO includes well-defined, highly efficient compression algorithms such as DEFLATE, LZMA, and LZJU90, providing full interoperability with […]
FPGAs deliver more, memory, logic, and security
Lattice Semiconductor extended its long-standing leadership in control of FPGAs with the introduction of the Lattice MachXO5-NX family, the fifth device built on the award-winning Lattice Nexus platform. MachXO5-NX FPGAs enable the latest generation of secure control through increased logic and memory resources, robust 3.3 V I/O support, and a differentiated security feature set. Designed […]
CAN IP optimized for FPGA apps
Arasan announces the immediate availability of its 2’nd generation of CAN IP for the CAN 2.0 and CAN FD Specifications. The controllers have been rearchitected and upgraded to lower power consumption and area, which make them suitable for FPGA applications in addition to Arasan’s primary ASIC IP market. Although automobiles do not have stringent power requirements like […]
IP core modules facilitate reuse of SoC, MCU, FPGA and ASIC functions
The Fraunhofer Institute for Photonic Microsystems IPMS offers ready-made, platform-independent IP core modules. With IP modules, developers can quickly adopt complete functional areas in standard products such as SoCs, microcontrollers, FPGAs and ASICs. This allows a significant reduction of development times and costs. With EMSA5, Fraunhofer IPMS offers a processor core based on the open […]
Rad-hard eFPGA IP works with 90-nm rad-hard fab process
QuickLogic Corporation announced it has teamed with SkyWater Technology to make a “fast boot” rad-hard eFPGA IP available to users of SkyWater’s 90 nm rad-hard (RH90) process. This technology can be embedded as an IP core in ASIC and SoC devices or implemented as a custom rad-hard FPGA for mission-critical and/or ruggedized applications. QuickLogic’s eFPGA […]
Encrypter IP core module brings on-the-fly encryption/authentication to external memory
Silex Insight is now extending its offering by launching a high throughput DDR encrypter (100Gbps). The DDR encrypter IP Core module enables on-the-fly encryption and authentication to the external memory. It is highly configurable and may be optimized for various sizes, throughput, and latency trade-offs. The core is device independent and is highly portable. Many ASIC/FPGAs are now […]
