Synopsys announced the availability of Design Compiler NXT, the latest innovation in the Design Compiler family of RTL synthesis products. Early adopters have deployed the new technologies in their design flows and are realizing faster runtimes and very tight correlation with Synopsys’ IC Compiler II place-and-route system, leading to shorter, more convergent design cycles. In […]
Machine Learning Inference software facilitates neural network SoC dev
Synopsys announced the availability of the new embARC Machine Learning Inference software library to facilitate development of power-efficient neural network system-on-chip (SoC) designs incorporating Synopsys’ DesignWare ARC EM and HS DSP Processor IP. The embARC Machine Learning Inference (MLI) software library provides developers with optimized functions to implement neural network layer types, significantly reducing processor cycle […]
Security package helps thwart hacking of ARC HS3x/HS4x processors
Synopsys announced the new Enhanced Security Package for Synopsys DesignWare ARC HS Processors, enabling designers to develop isolated, secure environments that help protect embedded systems and software from evolving threats in high-end automotive, storage, and gateway applications. The Enhanced Security Package incorporates a range of features, including integrity protection, multiple privilege levels, and a watchdog […]
Machine Learning Inference library optimized for IoT neural net apps
Synopsys announced availability of the new embARC Machine Learning Inference software library to facilitate development of power-efficient neural network system-on-chip (SoC) designs incorporating Synopsys’ DesignWare ARC EM and HS DSP Processor IP. The embARC Machine Learning Inference (MLI) software library provides developers with optimized functions to implement neural network layer types, significantly reducing processor cycle counts for […]
Verification IP from Synopsys supports USB4 spec
Synopsys, Inc. announced the availability of the industry’s first Subsystem Verification Solution, Verification IP (VIP), and UVM source code test suite to support the latest USB4 specification. USB4 includes two-lane operation using the existing USB Type-C connector that can carry up to 40Gbps data over new certified cables. USB4 also supports Thunderbolt 3 and expands USB […]
Integrated software speeds development for ARC EM Processor SoCs
Synopsys announced the new DesignWare ARC EM Software Development Platform to accelerate software development and debug of ARC EM processor-based system-on-chips (SoC) for a wide range of ultra-low power embedded applications such as IoT, sensor fusion, and voice applications. The ARC EM Software Development Platform includes an FPGA-based hardware board with commonly used peripherals and downloadable platform […]
Security package helps prevent hacks of SoCs in embedded applications
Synopsys announced the new Enhanced Security Package for Synopsys DesignWare ARC HS Processors, enabling designers to develop isolated, secure environments that help protect embedded systems and software from evolving threats in high-end automotive, storage, and gateway applications. The Enhanced Security Package incorporates a range of features, including integrity protection, multiple privilege levels, and a watchdog timer that […]
Hardware-software platform helps develop/debug ARC EM-based SoCs
Synopsys, Inc. announced the new tform to accelerate software development and debug of ARC EM processor-based system-on-chips (SoC) for a wide range of ultra-low power embedded applications such as IoT, sensor fusion, and voice applications. The ARC EM Software Development Platform includes an FPGA-based hardware board with commonly used peripherals and downloadable platform packages. The Development Platform […]
Static analysis technology updated with security for enterprise applications
Synopsys, Inc. announced the availability of a new version of its Coverity static application security testing (SAST) solution, which enables organizations to build secure applications faster. The latest release of Coverity addresses three increasingly important needs for enterprise application security teams: scalability, broad language and framework support, and comprehensive vulnerability analysis. Coverity enables enterprise organizations to scale […]
RTL to GDSII compiler delivers 20% better QoR, 2X faster time-to-results
Synopsys has unveiled Fusion Compiler, an innovative RTL-to-GDSII product that enables a new era in digital design implementation. By fusing a novel high-capacity synthesis technology with the IC Compiler II industry-leading place-and-route technology, Fusion Compiler offers new levels of predictable quality-of-results (QoR) to address the challenges presented by the industry’s most advanced designs. This unified […]
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