Marvell (NASDAQ:MRVL) has announced expansion of its Non-Volatile Memory Express (NVMe) solid-state drive (SSD) controller technology to support Host Memory Buffer (HMB), an NVMe revision 1.2 feature enabling DRAM-less SSDs to use host memory and achieve performance comparable to SSD designs with embedded DRAM but at much lower cost and power consumption. Marvell’s 88NV1140 marks the industry’s first SSD controller that supports HMB. Furthermore Marvell is partnering with other leaders in the PC ecosystem to accelerate the adoption of HMB-enabled SSDs for a new generation of low power, small form factor mobile computing systems.
Marvell’s 88NV1140 is the world’s first DRAM-less NVMe SSD controller for mass market mobile computing solutions with industry-leading NANDEdge low-density parity check (LDPC) technology supporting triple-level cell (TLC) and 3D NAND. It enables small form factor SSD solutions with unparalleled performance for integration into low-z-height tablets, Chromebooks and new 2-in-1 hybrid/detachable mobile PC platforms. Additionally, Marvell’s 88NV1140 has enabled the industry’s first hardware to support the new NVMe HMB feature. By leveraging memory allocated from the host system, the DRAM-less based 88NV1140 is able to scale up performance without limitations of conventional DRAM-less architectures.
Key features and benefits of Marvell’s 88NV1140 include:
- Powerful dual core Cortex R5 CPUs
- Embedded SRAM with hardware accelerators to optimize IOPS performance
- DRAM-less SSD through NVMe interface leverages HMB to scale up performance and reduce total BOM cost
- NANDEdge LDPC error-correction technology boosts SSD endurance and supports 15nm TLC and 3D NAND
- Low power management (L1.2) design
- 28nm low power CMOS process
Marvell will be showcasing its Host Memory Buffer and other cutting-edge storage solutions at CES 2016 in Marvell’s suite, Level 3, Murano No. 3304, at The Venetian. CES is being held in Las Vegas at the Las Vegas Convention and World Trade Center and the Venetian Hotel on Jan. 6–9, 2016.