Faraday Technology Corporation today announced that the availability of its USB 3.1 PHY on UMC 28HPC process, as well as the silicon-verified USB 3.1 Type-C PHY with USB-PD 2.0 support on UMC 40LP process. Faraday introduced the industry’s first USB 3.0 PHY IP solution in 2009; today’s launched USB 3.1 Gen 1 solutions are then designed with optimized PPA (Power/Performance/Area) to address the low-power requirements for mobile devices, digital cameras, MFPs (multi-function printer), automotive, and IoT applications.
Faraday offers a series of USB IP solutions in a broad range of nodes from 0.25um to 28nm, and its related ICs have already shipped over hundreds of millions units. To meet the growing demand for USB Type-C interface, Faraday also delivers USB Power Delivery (PD) 2.0 IP supplying power up to 100W. In addition, Faraday supports its customers with expert ASIC design services and a comprehensive IP portfolio to facilitate the reduction of design risk and cost, enabling quick penetration into their target markets.
“Faraday pioneered composite USB solutions with outstanding mixed-signal circuit design ability,” said Flash Lin, Chief Operating Officer at Faraday. “The latest Faraday USB 3.1 IP solutions demonstrate our commitment to providing low-power interface IPs for mainstream applications. Based on our deep knowledge of USB IP development and compatibility testing, we are confident we can help customers enhance the user experience of USB products built with our tailored ASIC solution.”
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