Acromag has introduced the XMC‑FZU7EV module, an embedded computing solution built around the AMD (Xilinx) Zynq UltraScale+ MPSoC. The module integrates multi‑core ARM processors, programmable FPGA logic, a GPU, and a hardware video codec in a compact XMC mezzanine format, supporting high‑speed serial and 10‑gigabit Ethernet interfaces for real‑time control and data‑intensive processing.
The AMD XCZU7EV MPSoC combines a quad‑core ARM Cortex‑A53 application processor with a dual‑core ARM Cortex‑R5 real‑time processor. The programmable logic resources include approximately 500,000 logic cells, 1,728 DSP slices, dedicated RAM blocks, and high‑speed serial interfaces. Integrated components also include a Mali‑400 GPU and H.264/H.265 video codec for low‑latency embedded vision processing.
High‑speed connectivity is available through multiple interface options. When installed on a VPX or PCIe carrier card with front‑panel I/O, the optional AXM‑FZU01 plug‑in card provides dual QSFP+ ports for direct 10‑gigabit Ethernet connections to the FPGA. In conduction‑cooled configurations, the module supports backplane I/O with a VITA 66 fiber‑optic transceiver linking four 16 Gb/s lanes to the programmable logic.
The XMC‑FZU7EV format enables deployment on VPX, VME, PCIe, and other embedded computing carrier cards. Both air‑cooled and conduction‑cooled variants are offered. Carrier‑level I/O expansion supports interfaces for RF, fiber optics, USB, video, serial links, and LVDS signaling.
The Zynq UltraScale+ architecture integrates the processing system and FPGA fabric through high‑bandwidth on‑chip interconnects, eliminating the latency associated with multi‑chip solutions. This enables custom co‑processors, optimized memory architectures, and application‑specific acceleration for real‑time control, video processing, waveform analysis, packet handling, deep learning, and AI inference within constrained power budgets. Security features are included to support critical and safety‑sensitive operations.
Acromag provides an Engineering Design Kit (EDK) with example designs for host access to hardware I/O. Examples are implemented in the AMD Vivado environment, with support for Vitis and PetaLinux. Operating system support includes VxWorks, Linux, and Windows.
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