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Instruction set simulator (ISS) for Mi-V RISC-V soft CPUs

December 17, 2017 By Aimee Kalnoskas Leave a Comment

Instruction set simulatorMicrosemi Corporation and Imperas Software Ltd. announced the Extendable Platform Kit for Microsemi Mi-V RISC-V soft central processing units (CPUs). The collaboration delivers the first commercially available instruction set simulator (ISS) for Microsemi’s Mi-V ecosystem, a program designed to increase adoption of Microsemi’s RISC-V soft CPU product family utilizing RISC-V open instruction set architectures (ISAs).

“Building out the Mi-V RISC-V ecosystem with the Imperas Extendable Platform Kit (EPK) is a vital piece of our ecosystem offering as we continue to expand this program and enhance our ability to deliver innovative solutions for customers,” said Bruce Weyer, vice president and business unit manager at Microsemi. “The Imperas EPK allows for rapid software development and debugging of corner cases when using Mi-V soft CPUs on Microsemi field programmable gate array (FPGA) products. We look forward to working with Imperas and other Mi-V ecosystem members to deliver more RISC-V processor-based solutions.”

Imperas’ Virtual Extendable Platform Kit provides a software simulation environment for the development, debugging and testing of software running on Microsemi’s RISC-V soft core. This environment, with improved controllability, visibility, repeatability and ease of automation, accelerates software development. This enables higher quality software, particularly for applications demanding reliability, safety and security. As the first commercially supported ISS for RISC-V processors, with debug integrated with SoftConsole, the kit is also an example platform running the FreeRTOS operating system. Customers can now choose commercially supported ISS for their software development tasks versus an open source, self-support-style ISS.

“Microsemi has taken a leading role in the RISC-V community, helping drive this technology which delivers both technical and business innovations,” said Simon Davidmann, Imperas CEO. “Imperas is thrilled to be collaborating with Microsemi to offer software development tools that play a key role in supporting the early adoption of RISC-V-based silicon.”

In addition to enabling agile software development and testing, the EPK provides enhanced visibility into the processor subsystem, offering software debug, test and analysis capabilities not typically found in silicon. The EPK is ideal for developing a wide variety of applications within the aerospace and defense, communications and industrial markets, including strategic weapons platforms, secure communications, wireline aggregation and machine vision.

Filed Under: Aerospace and Defense, Applications, Industrial, Telecommunications Tagged With: imperas, microsemicorporation

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