Synopsys, Inc. announced the availability of its next-generation architecture exploration, analysis, and design solution, Platform Architect Ultra, to address the system challenges of artificial intelligence (AI)-enabled system-on-chips (SoCs). Architects of neural network enabled SoCs need to carefully balance the required convolutional neural network (CNN) throughput against the available power and performance budget that data center or embedded devices can sustain. Platform Architect Ultra flexibly maps CNN algorithms and workloads to explore processing and memory architecture options, enabling architects to analyze, select, optimize, and tune algorithms and architectures for performance and power requirements.
Synopsys’ Platform Architect Ultra, developed in collaboration with AI SoC leaders, is the next-generation release of Platform Architect, embedding the latest technology to efficiently perform dynamic simulation of multicore architectures. Platform Architect Ultra introduces SMART Tables for context-sensitive data entry and error checking, and SMART Charts for visual root-cause sensitivity analysis of candidate architectures. It also introduces a hierarchical design concept for fast creation and packaging of a design, including ready-to-map workloads, architecture models, and AI reference system, including CNN frameworks such as Caffe and TensorFlow, enabling architects to quickly analyze and optimize a proposed architecture design.
“Through our collaboration with leading AI SoC companies, we know that architecture teams must carefully balance power, performance, and programmability to succeed in this highly competitive market,” said Eshel Haritan, vice president of R&D in the Synopsys Verification Group. “Platform Architect Ultra’s parallelized exploration, performance, and power optimization capabilities allow designers of neural network architectures and algorithms to quickly find a balanced architecture and eliminate late changes in SoC design.”