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Two-wire MIPI I3C PHY I/O chips consolidate I2C, SPI features

December 2, 2021 By Redding Traiger

Arasan Chip Systems announces the immediate availability of Arasan’s MIPI I3C PHY I/O IP, in compliance with MIPI I3C specifications v1.1. Arasan’s MIPI I3C PHY IP is part of Arasan’s Total IPTM Solution for MIPI I3C v1.1. Arasan’s 2-wire MIPI I3C PHY I/O consolidates the features of I2C and SPI leading to an overall low pin count, shorter signal path, simplified design, and reduced power and cost. It operates in sync with the IP core’s clock rates up to 12.5 MHz and provides options for higher performance and high data rates.

Arasan’s MIPI I3C Total IPTM solution is a seamless integration of the MIPI I3C controller, MIPI I3C PHY I/O, and MIPI I3C software stack. Arasan’s MIPI I3C Total IPTM solution is a simplified, backward compatible with I2C, scalable, and cost-effective interface. In the fast-growing sensor market, Arasan’s MIPI I3C Total IPTM solution along with Arasan’s Total IPTM solution for MIPI CSI-2 and MIPI DSI-2 enables developers in the Automotive, Mobile, and IoT industries with a complete image sensor and display interface solution. Arasan’s MIPI I3C host controller interface features power-efficient operations that help in maximizing the battery life which is ideal for the mobile industry.

Arasan’s MIPI I3C Total IPTM solution is silicon-proven and has passed multiple interoperability tests organized by the MIPI Association.

Arasan’s MIPI I3C PHY I/O IP is available for FinFET process nodes that also support 1.8V/1.2 +/-10% supply for IOs and 0.8V +/-10% supply for the core.

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Filed Under: Applications, Automotive, Controllers, Display modules, IoT, Products, Sensor modules, Tools Tagged With: arasanchipsystems

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