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Verification IP and test suite covers Arm AMBA ACE5 and AXI5

February 1, 2018 By Aimee Kalnoskas Leave a Comment

Verification IP and test suiteSynopsys, Inc. announced availability of its Verification IP (VIP) and source code Test Suite for Arm AMBA ACE5 (AXI Coherency Extensions) and AXI5. Synopsys has collaborated with Arm to deliver the next-generation ACE5 and AXI5 VIP with increased performance for faster verification closure.

AXI5 and ACE5 adds new features for atomic operations to improve the performance and data check and poisoning to identify data corruption. ACE 5 and AXI5 also adds new low power wake-up signals to provide a single, glitch-free indication that activity on the interface is required. In addition, ACE5 has added support for cache stashing to improve data locality, new de-allocating and cache maintenance transactions, as well as DVM message support for Armv7, Armv8, and Armv8.1 Cortex®-A processors.

Synopsys VIP provides performance metrics for latency and throughput analysis, configurable interconnect model, a reference verification platform and system level checks for protocol, data integrity, and cache coherency. Built-in coverage and verification plans are also included to speed up verification coverage closure. In addition, VIP is natively integrated with the Synopsys Verdi Protocol Analyzer debug solution.

 

Filed Under: microcontroller, Tools Tagged With: synopsys

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