Working group to specify MicroTCA improvements for timing and bandwidth

PICMG announces that the MicroTCA Working Group is working on the next generation of the MTCA architecture specifications initially launched in 2006. Efforts target improvements for time-sensitive and high bandwidth applications such as in high-energy physics. Current work includes accommodations for the next generation of CPUs and FPGAs that will natively support PCIe gen 5. Future applications in the industry require this higher bandwidth i.e. for image processing, signal detection, and data acquisition. As current CPU speeds are limited by 80 W per slot power limit the support of more power for faster CPUs is on the task list as well. Future applications will also require other kinds of high- and low-speed fabrics paired with more flexibility in system design. The science market segment for high frame rate Megapixel detectors of the actual photon experiments requires even higher throughput. Thus, all these demands are scheduled to become part of the new releases of these successful specifications. With all these improvements MicroTCA continues to be a proactive specification with significant updates to support high-bandwidth backplane interconnects. The latest update of the specs happened as recently as 2020.