Arasan has released an all-new version of its MIPI DSI IP compliant with the DSI-2 v1.0 Specifications supporting C-PHY v2.0 speeds of up to 54.72Gbps operating at 8 Gbps (for 1channel) for FPGA designs. This IP is designed to meet FPGA timing limitations to run at slower frequencies at less than 200 Mhz while still providing the necessary bandwidth.
Arasan’s MIPI DSI IP for FPGA has been seamlessly integrated and tested with its MIPI C-PHY / D-PHY Combo ASIC. The C-PHY / D-PHY ASIC is available on an FPGA HDK configured with MIPI DSI Tx and Rx or CSI Tx and Rx from our partner Testmetrix. Arasan and Testmetrix successfully demonstrated their platform at MIPI Vancouver.
The target market for this FPGA version of our MIPI DSI IP is production test and compliance test companies who currently use or are adopting Arasan’s CSI and DSI IP or companies looking to have a C-PHY based FPGA solution for prototyping or limited production using Arasan’s C/D-PHY Combo ASIC. Arasan also licenses its C-PHY / D-PHY Combo IP on foundry nodes down to 5 nm for companies to migrate or implement on an ASIC.
The MIPI DSI IP for FPGA is available for immediate licensing. Customers licensing our DSI Controller IP can have peace of mind knowing our IP is compliant with the specifications. It is used to test Compliance!
