Floating-point library supports embedded variant of RISC-V core

SEGGER announces a new version of the RISC-V Floating-Point Library with full support for RV32E – the embedded variant of the RISC-V core. The new library leads to a massive reduction in code size for RISC-V applications using floating point.

With all arithmetic functions hand-coded in assembly language, the memory footprint of RISC-V applications using floating-point code is minimized. The Floating-Point library complies with the RISC-V ABI standard and can therefore be easily used as a plug-and-play replacement for any other floating point library.

Replacing the GNU floating-point library used by most toolchains with the SEGGER assembly optimized equivalent results in an over 72% code size reduction of the benchmark application. The library supports RV32I, as well as the newly introduced RV32E embedded variant of the RISC-V core with the assembly-level code.

The library can be licensed by end customers and toolchain suppliers. Just like the SEGGER Runtime Library, it is integrated into SEGGER Embedded Studio for RISC-V. Using Embedded Studio, benchmarking for both floating-point and runtime libraries can be done quickly and easily. It is readily available at no cost for non-commercial usage under SEGGER’s Friendly License.