IAR announced enhancements to its premier development environment to support the first general-purpose 32-bit RISC-V MCUs with Renesas’ internally developed CPU core. This enhanced offering includes advanced debugging capabilities and sophisticated compiler optimizations fully integrated with the Renesas Smart Configurator toolkit, design examples, rich documentation, and support for the Renesas fast prototyping board (FPB). As […]
RISC-V
RISC-V MCU group designed for diverse power-efficient applications
Renesas Electronics Corporation has introduced the industry’s inaugural general-purpose 32-bit RISC-V-based microcontrollers (MCUs) featuring an internally developed CPU core. While many MCU providers have recently collaborated in investment alliances to propel RISC-V product development, Renesas has independently designed and tested a new RISC-V core, now integrated into a commercial product available worldwide. The new R9A02G021 […]
Debugging probe covers RISC-V and Arm processors
The new flagship model J-Trace PRO is now the “all-in-one” probe for any popular CPU core and architecture. It combines all the debug capabilities of the market-leading J-Link series with all the analyzing, verifying, and code-profiling features of the J-Trace series to get a truly one-stop solution. J-Trace PRO offers multi-platform support (RISC-V, Arm), up […]
RISC-V processor boasts 40 percent performance improvement
Ventana Micro Systems Inc. announced the second generation of its Veyron family of RISC-V processors. The new Veyron V2 is the highest-performance RISC-V processor available today and is offered in the form of chiplets and IP. Ventana provides a Software Development Kit (SDK) which includes a comprehensive set of software building blocks already proven on […]
Security model provides system-level approach to securing RISC-V designs
SiFive, Inc. announced the company is giving the WorldGuard security model to RISC-V International, providing the RISC-V community with a uniform way to secure their designs and bring them to market faster. RISC-V International is the non-profit home of the open standard RISC-V Instruction Set Architecture (ISA), related specifications, and stakeholder community which has more […]
Software-defined SoC platform now compatible with RSIC-V
XMOS reveals a RISC-V-compatible architecture for the fourth generation of its xcore platform. The collaboration delivers the flexibility to define entire systems in software, enabling RISC-V programmers to rapidly realize the most differentiated and economical solutions to the intelligent IoT. By transitioning to a RISC-V compatible architecture, more embedded system designers will have access […]
RISC-V processor runs at 3.6 GHz in 5nm
Ventana Micro Systems Inc. announced its Veyron family of high-performance RISC-V processors. The Veyron V1 is the first member of the family, and the highest-performance RISC-V processor available. It will be offered in the form of high-performance chipsets and IP. Ventana Founder and CEO Balaji Baktha will make the public announcement during his RISC-V Summit […]
Scalable RISC-V multiprocessor IP promotes efficient SoC uses
As the shift toward RISC-V accelerates across industries, the open standard instruction set architecture (ISA) is ushering in a new wave of innovation and collaboration. In an effort to help fuel this trend, MIPS has announced the availability of the eVocore P8700, the industry’s highest-performance, most scalable RISC-V multiprocessor IP. The P8700 has already been […]
Linux platform supports RISC-V embedded development
Siemens Digital Industries Software announced that its Sokol Flex OS software now supports RISC-V embedded development with the availability of one of the industry’s first commercially supported, extensible, and customizable Linux platforms for the RISC-V architecture. Based on the popular, open-source Yocto Project industry standard, Siemens‘ Sokol Flex OS helps embedded developers create customized, Linux-based […]
RISC-V: The background, the benefits, and the future
by Mark Lippett, CEO of XMOS US developers conceived the revolutionary instruction set architecture (ISA) known as RISC-V in 2010. Grounded in reduced instruction set computer (RISC) principles, it’s a common, open-source, and completely free ISA that can be used to develop software and hardware. These attributes are just part of what makes the architecture […]