For developers using RISC-V-based platforms, the architecture offers unique features that can help achieve functional safety and security objectives. From its open architecture to a rich tools ecosystem, safety-critical software teams see benefits in meeting the guidelines of DO-178C and ISO 26262, for example, and opportunities to reduce compliance effort. Understanding how to map RISC-V’s […]
RISC-V
Virtual kit supports pre-silicon software for MCU architectures
Infineon Technologies AG plans to introduce a new automotive microcontroller family based on RISC-V architecture in the coming years. This new family will become part of Infineon’s AURIX automotive microcontroller brand, expanding the existing portfolio that currently includes TriCore (AURIX TC family) and Arm-based solutions (TRAVEO family, PSOC family). The upcoming AURIX family will address […]
RISC-V core supports multi-sensor vehicle processing
MIPS announced the general availability(GA) launch of the MIPS P8700 Series RISC-V Processor. Designed to meet the low-latency, highly intensive data movement demands of the most advanced automotive applications such as ADAS and Autonomous Vehicles (AVs), the P8700 delivers industry-leading accelerated compute, power efficiency and scalability Typical solutions for ADAS and autonomous driving rely on […]
Support for RISC-V debugging added to performance analyzer
SEGGER has expanded the capabilities of its debugger and performance analyzer, Ozone, by adding semihosting support for debugging RISC-V applications. This feature now enables RISC-V developers to use I/O to perform debugging tasks on the embedded system directly accessible by the host system, without the need for complex hardware setups. By using the host’s resources, developers […]
RISC-V updates operating system compatibility profile
RISC-V Ratifies RVA23 Profile for 64-bit Application ProcessorsRISC-V International announced the ratification of the RVA23 Profile, establishing standardized specifications for 64-bit application processors running rich operating systems. This profile enables software portability across different hardware implementations, helping developers avoid vendor lock-in while creating a common target for software development. The RVA23 Profile introduces two significant […]
RISC-V releases new application processor standard
RISC-V International has ratified the RVA23 Profile for 64-bit application processors. This profile standardizes operating system compatibility and software portability across hardware implementations, reducing vendor lock-in for system developers. The RVA23 Profile completed development and review through RISC-V’s 80 technical working groups before board ratification. The profile defines mandatory and optional features that developers can […]
IP series to address diverse AI computing needs
SiFive, Inc., has introduced the SiFive Intelligence XM Series for AI workload acceleration. This new product line features an AI matrix engine designed for system-on-chip solutions in Edge IoT, Consumer devices, electric/autonomous vehicles, and data centers. SiFive also plans to release an open-source reference implementation of its SiFive Kernel Library (SKL). The XM Series incorporates […]
Eclipse Temurin expands support to 54 version/platform combinations including RISC-V
The Eclipse Foundation, in collaboration with the Adoptium Working Group, has announced the latest release of Eclipse Temurin’s Java SE runtime. This release supports 54 version/platform combinations and five major OpenJDK versions, demonstrating Adoptium’s commitment to providing a diverse range of supported builds for Linux, Mac, Windows, and various architectures, including x64, ARM, and RISC-V. […]
Code generator integrates with 32-bit RISC-V MCU line
In collaboration with Renesas, SEGGER announces that Embedded Studio has now been integrated into the Renesas code generator known as Smart Configurator. This brings end-to-end SEGGER support for the new R9A02G021 group of MCUs, Renesas’ first 32-bit RISC-V devices for general-purpose applications. The Renesas Smart Configurator enables design engineers to graphically configure all MCU peripherals such as timers, interfaces, […]
Advanced development tools tailored for general-purpose, 32-bit RISC-V MCUs
IAR announced enhancements to its premier development environment to support the first general-purpose 32-bit RISC-V MCUs with Renesas’ internally developed CPU core. This enhanced offering includes advanced debugging capabilities and sophisticated compiler optimizations fully integrated with the Renesas Smart Configurator toolkit, design examples, rich documentation, and support for the Renesas fast prototyping board (FPB). As […]
