SEGGER’s products are already fully compatible with SiFive’s RISC-V processor cores, and now its J-Link probes deliver support for the new SiFive Insight debug/trace solution. This includes SiFive’s latest Nexus-based trace implementation, which enables ongoing monitoring and recording of processor instruction execution. Via SEGGER’s highly popular J-Link PLUS, PRO and ULTRA debug probe options, plus […]
Software tools support RISC-V processor SoC development tasks
Segger has announced its full support for Nuclei RISC-V processor SoCs. Nuclei System Technology is a leading vendor of RISC-V processor IP in China. In August of 2019, Nuclei and GigaDevice announced the first RISC-V general-purpose MCU, the Bumblebee. Support includes SEGGER’s Embedded Studio IDE, its market-leading J-Link debug probe, and its Ozone debugger. Also […]
RISC-V reference models support processor verification
Imperas Software Ltd., announced the latest enhancements to its range of RISC-V reference models and solutions to support processor verification, with the leading commercial SystemVerilog hardware design verification environments provided by Cadence, Mentor, Synopsys, and also the Metrics cloud-based tools. Working together with lead customers, industry groups and associations, and the Google Instruction Stream Generator […]
Early Access Program for FPGAs enables design of power-efficient applications
The trend towards compute-intensive gateways and edge devices is driving the integration of traditional deterministic control applications with additional embedded processing capabilities needed for smart and secure connected systems. In response, Microchip Technology Inc. is opening the Early Access Program (EAP) for the PolarFire field programmable gate array (FPGA) system-on-chip (SoC). The platform offers the world’s […]
Platform helps implement security features in SoCs
SiFive Inc. announced the release of SiFive Shield, a class-leading new platform security architecture. SiFive Shield is an innovative new approach to SoC design, offering a whole SoC approach to security that enables secure lifecycle management, reduces trusted computing base, and offers a clear root-of-trust. Modern SoC designs require scalable security architectures with greater isolation […]
Real-time system verification tool now available for RISC-V embedded systems
Segger’s SystemView reveals the true runtime behavior of an application by utilizing its real-time recording and visualization capabilities. It uses J-Link and Segger’s Real-Time Transfer (RTT) technology for continuous real-time recording and live analysis. The numerous benefits of SystemView can now be applied to any RISC-V embedded system via System Bus Access (SBA). Freely available […]
Development system works with flash-based RISC-V MCU
SEGGER Embedded Studio V4.20 adds fully configurable support for debug probes using the GDB protocol. The new version can now be used with any debug probe that comes with a GDB Server. This new feature is included in all editions: ARM, Cortex-M, and RISC-V, on Windows, macOS, and Linux 32- and 64-bit platforms. Embedded Studio […]
Programmable camera incorporates convolutional neural network hardware accelerator for AI apps
M5STACK announces today its further expansion into the AIOT(AI+IOT) edge computing market with the K210 RISC-V 64 AI Camera— an innovative machine vision and machine learning programmable camera that’s competitively priced to meet the needs of a rapidly growing AI market. AI cameras help engineers quickly implement machine learning, image recognition, and speech recognition functions, and […]
Silicon reference design now available for open-source RISC-V MCU
X-FAB Silicon Foundries together with crowd-sourcing IC platform partner Efabless Corporation announced the successful first-silicon availability of the Efabless RISC-V System on Chip (SoC) reference design. This open-source semiconductor project went from design start to tape-out in less than three months using the Efabless design flow based on open-source tools. The mixed-signal SoC, called Raven, […]
Hex Five adds MultiZone security to the AdaCore software ecosystem
Hex Five Security Inc., creator of MultiZone, the first trusted execution environment for RISC-V, today joined AdaCore’s Partner Program to enable the secure execution of Ada applications on RISC-V processors. As part of the initiative, Hex Five has developed an Ada version of the MultiZone SDK and published a reference application showing how to securely […]
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