I²C-programmable XOs provide superior jitter performance for 100/200/400G apps

A new family of high-performance I²C-programmable crystal oscillators (XOs) are said to deliver best-in-class jitter performance and frequency flexibility. With typical jitter performance as low as 95 fsec, the Si544/Si549 Ultra Series programmable XOs maximize jitter margin for clocking high-speed 28 Gbps and 56 Gbps transceivers used in 100/200/400G communications and data center applications. The devices are capable of generating any frequency from 200 kHz to 1.5 GHz with no frequency gaps and four parts-per-trillion (ppt) tuning resolution, enabling a single device to work across a broad spectrum of applications.

Devised by Silicon Graphics, the Si544/Si549 XOs support up to four preset, pin-selectable start-up frequencies. After power-up, the device operating frequency can easily be changed via an I²C interface. This configuration flexibility lets a single oscillator replace multiple single, dual and quad-frequency XOs and multiplexer (mux) devices. The device can be powered from a single 1.8, 2.5 or 3.3-V supply, eliminating the need for different XO part numbers for different supply voltages. The Si54x XO I²C interface supports update rates as high as 1 MHz (Fast-mode Plus), maximizing compatibility with a broad range of ASSPs, ASICs, SoCs and FPGAs.

The Si544/Si549 XOs are available in 3.2 x 5 and 5 x 7-mm standard, fixed-frequency XO packages. This compatibility enables hardware designers to prototype with an I²C-programmable XO and easily migrate to a single-frequency XO when the design transitions to production.

The Si54x XOs are purpose-built for 56 Gbps transceiver designs. These designs rely on pulse-amplitude modulation (PAM4) signaling for serial data transmission. PAM4 uses four-level signaling to boost the bit rate per channel while keeping the bandwidth constant. This tradeoff makes the design inherently more susceptible to noise. Using an ultra-low-jitter reference clock such as the Si544/Si549 devices maximizes signal-to-noise ratio (SNR) headroom, helps prevent bit-errors and helps maintain signal integrity.

The Si544/Si549 oscillators use advanced fourth-generation Silicon Labs DSPLL technology to provide an ultra-low-jitter clock source at any output frequency. On-chip power supply regulation provides power supply noise rejection, enabling consistent, reliable low-jitter operation in noisy environments often found in high-speed networking and data centers. The Si544/Si549 XOs also provide flexible, reliable drop-in replacements for low-jitter surface acoustic wave (SAW)-based oscillators while offering superior frequency tolerance and temperature stability. The Si544/Si549 oscillators support all popular output formats including LVDS, LVPECL, HCSL, CML, CMOS and dual CMOS.

In addition to the Si544/Si549 family, Silicon Labs is significantly expanding its XO/VCXO portfolio to include a broader array of package options. These complementary products include Si54x Ultra Series XOs in the industry-standard 5 x 7-mm package, Si59x general-purpose XO/VCXOs (3.2x 5 mm) and Si51x general-purpose XO/VCXOs (2.5 x 3.2 mm).

Samples and production quantities of the Si544/Si549 Ultra Series oscillators are available now. Silicon Labs offers two pricing levels for the Si54x family depending on the jitter requirements. Pricing in 10,000 unit quantities begins at $8.36 (USD) for Si549 XOs (95 fsec rms jitter) and at $6.69 (USD) for Si544 XOs (150 fsec rms jitter). The new Si5xxUC-EVB universal evaluation board, priced at $95 (USD MSRP), provides device evaluation.

Silicon Labs, 400 West Cesar Chavez, Austin, TX 78701,512-416-8500, 877-444-3032 (toll-free), www.silabs.com/ultra-series