Synopsys announced its new native automotive solutions for more efficient system-on-chip (SoC) design. The accelerating evolution of vehicle technologies means that more automotive chips are required to satisfy higher automotive safety integrity levels (ASILs) for autonomous driving and advanced driver-assistance systems (ADAS). Synopsys’ native automotive design solutions enable designers to achieve their target ASILs by providing the industry’s most comprehensive feature set to implement functional safety (FuSa) mechanisms, such as triple-mode redundancy (TMR), dual-core lock-step (DCLS), and failsafe finite state machine (FSM).
With the differentiation available through native automotive solutions, designers can generate the industry’s first FuSa intent early in the design flow to describe safety mechanism behavior, which is used as input and maintained throughout the digital design flow. Synopsys’ native automotive solutions comprise a complete digital design flow incorporating FuSa-enabled technologies, which work together to maximize efficiency. These technologies include:
- TestMAX FuSa performs early functional-safety analysis at RTL- or gate-level and identifies candidates for TMR or DCLS redundancy to achieve single-point fault metric (SPFM) goals for target ASIL
- Design Compiler NXT synthesis, IC Compiler II place-and-route, and Fusion Compiler design insert, check, and report the safety mechanisms implemented
- Formality equivalence checker functionally verifies that the RTL matches the netlist after redundancy or additional logic modules are inserted
- IC Validator physical signoff verifies the layout and reports that all redundancy mechanisms are correctly implemented
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