Mentor announced that TSMC has certified multiple Mentor product lines and tools for the foundry’s recently announced 3nm (N3) process technology.

The Mentor offerings now certified for TSMC’s N3 process include the Analog FastSPICE Platform, which provides leading-edge circuit verification for nanometer analog, radio frequency (RF), mixed-signal, memory and custom digital circuits.

Mentor has also expanded its support for TSMC’s 2.5/3D offering with Mentor’s Xpedition software, including Xpedition Substrate Integrator for design planning and netlisting and Xpedition Package Designer for layout, now enhanced to meet TSMC’s requirements for InFO-R. In addition, Mentor’s Calibre platform 3DStack technology has expanded its support of inter-die LVS for TSMC offerings with support for CoWoS-S.

Mentor’s Calibre nmPlatform, which is the global IC verification industry leader, has added further certifications across multiple products for TSMC’s N3 and N5 processes including:

• The Calibre nmDRC and Calibre nmLVS tool suites, which are for IC physical and circuit verification sign-off. Calibre continues to deliver new advancements and functionality at each new process node, while delivering industry-leading accuracy, scalability and turnaround time.
• The Calibre PERC reliability platform, which employs a unique, integrated analysis of both the physical layout and the netlist to automate complex reliability verification checks. Mentor has worked with TSMC to provide a comprehensive capability for ESD (Electrostatic Discharge) and Latch-Up verification.
• The Calibre xACT parasitic extraction solution, which offers the high accuracy required for three-dimensional FinFET structures and gives Mentor and TSMC customers the ability to fully leverage the inherent performance benefits of TSMC’s 3nm offering.