Chip design software promotes high-throughput camera and display SoC development

Synopsys announced it is expanding its MIPI camera and display IP portfolio with the DesignWare MIPI C-PHY/D-PHY IP for a range of FinFET processes. The silicon-proven C-PHY/D-PHY IP is compliant with the MIPI C-PHY v1.2 and D-PHY v2.1 specifications for a low-risk solution targeting high-resolution imaging and display SoCs. In addition, the C-PHY/D-PHY meets the stringent functional safety and reliability requirements of automotive ADAS and infotainment applications. The DesignWare MIPI C-PHY/D-PHY IP combined with DesignWare MIPI DSI/DSI-2℠ and MIPI CSI-2℠ controllers provide a complete solution that eases connectivity to a variety of advanced image sensors and displays.

“For our latest 3D camera with intelligent computing, Synopsys’ DesignWare MIPI IP delivered the required low-power consumption, small silicon footprint, and real-time connectivity,” said Xiaolu Mei, co-founder and VP of R&D at Orbbec. “We integrated the IP in two weeks and achieved first-pass silicon success, all while meeting our design goals. We will continue our successful collaboration with Synopsys and are considering using Synopsys’ DesignWare C-PHY/D-PHY IP in our future designs.”

DesignWare C-PHY/D-PHY addresses energy requirements by supporting low-power state modes and delivering below 1.3pJ/bit at 24 Gb/s. The IP enables 4K and beyond displays and 100-megapixel cameras with support for up to 4.5 Gb/s per lane maximum speed in D-PHY configuration and 3.5 Gs/s per trio in C-PHY configuration. To improve system test and debug efficiency, the IP offers comprehensive built-in test capabilities, including pattern generator, logic analyzer, and loopback modes covering all circuits.

The high-performance, low-power DesignWare MIPI C-PHY/D-PHY IP interoperates with Synopsys’ MIPI DSI/DSI-2 and CSI-2 controllers, which support key features of the latest MIPI display and camera specifications including wider PHY protocol interface (PPI), multiple virtual channels, advanced RAW data types and display command set.

The DesignWare C-PHY/D-PHY IP in 7-nm and 12-nm processes are available now. The PHY in 16-nm, 6-nm, and 5-nm processes is scheduled to be available in the third quarter of 2020.  The DesignWare CSI-2, DSI/DSI-2, and MIPI I3C Controllers, and D-PHY are available now.