Renesas Electronics Corporation expanded its RZ/V Series with the RZ/V2N microprocessor designed for vision AI implementations. The RZ/V2N incorporates the DRP (Dynamically Reconfigurable Processor)-AI3 accelerator that delivers 10 TOPS/W power efficiency and AI inference performance up to 15 TOPS through pruning technology.
The RZ/V2N features a 15 mm square package, reducing mounting area requirements by 38% compared to the RZ/V2H model. The processor architecture minimizes heat generation, eliminating cooling fan requirements in embedded systems.
Technical specifications include four Arm Cortex-A55 CPU cores, a single Cortex-M33 core, and an Arm Mali-C55 image signal processor. The chip supports dual MIPI camera interfaces for connecting two cameras simultaneously, enabling double-angle image processing for improved spatial recognition and precision in applications such as motion analysis and object detection.
The RZ/V2N will be available with evaluation board kits and a software development environment starting March 19. The SDK includes over 50 AI application use cases through GitHub repositories. Third-party vendors will provide system-on-module boards, single board computers, and camera modules incorporating the RZ/V2N.
This processor completes the RZ/V series product range, which now spans from the entry-level RZ/V2L (0.5 TOPS) to the high-performance RZ/V2H (up to 80 TOPS), addressing requirements across various vision AI implementation scales.
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