SiFive announced the availability of the SiFive Core IP 7 Series, the highest performance commercially available RISC-V cores. The 7 Series product family is designed to enable embedded intelligence with features that have not been commercially available until today. The 7 Series includes the E7, S7 and the U7 series. SiFive Core IP provides a truly heterogenous, customizable architecture that provides customers with the ability to flexibly combine E, S and U cores within a single coherent core complex. Together, the SiFive E7, S7 and U7 Core IP Series will enable the next generation of RISC-V cores that will power 5G, networking, storage, augmented reality, virtual reality, artificial intelligence, simultaneous location and mapping (SLAM), and sensor fusion functionality.

The E7 Core IP Series comprises the 32-bit E76 and E76-MC and provides hard real-time capabilities. The SiFive Core IP S7 Series brings high performance 64-bit architectures to the embedded markets with the S76 and S76-MC. The SiFive Core IP U7 Series is a Linux-capable applications processor with a highly configurable memory architecture for domain-specific customization. The 64-bit U74 and U74-MC, like all SiFive U cores, fully support Linux, while the E76, E76-MC, S76 and S76-MC support bare metal environments and real-time operating systems.

All new cores offer efficient performance and optimized power consumption, appropriate for supporting smart offloads of data center workloads as well as those of extremely power-efficient edge devices. The U74-MC provides 64-bit addressability for real-time, latency sensitive applications such as 5G baseband processing, enterprise-class storage for fast or big data and multi-mode sensor fusion for AR/VR/SLAM applications.

The SiFive 7 Series provides a compelling feature set that includes scalable throughput provided by 8+1 cores per cluster, 64-bit memory addressability for real-time processors and in-cluster coherent combination of real-time processors and application processors. These features are currently not available from any other CPU IP vendor and are unique to SiFive’s Core IP series. The SiFive 7 Series also includes enhanced determinism for hard, real-time constraints and functional safety provided through a combination of built-in fault tolerance mechanisms. The 7 series is designed on a highly optimized 8-stage in-order pipeline, which introduces microarchitectural features to prevent side-channel attacks thereby enabling a robust and secure processor implementation.

For more information on SiFive’s RISC-V Core IP including full datasheets, specifications and app notes, visit https://www.sifive.com/core-designer.