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RISC-V processors offer upgrade for wearables and consumer products

November 8, 2022 By Aimee Kalnoskas

SiFive announced two new products that address the need for high performance and efficiency in a small size in high-volume applications like wearables, smarthome, industrial automation, AR/VR, and other consumer devices. The SiFive Performance P670 and P470 RISC-V processors bring unparalleled compute performance and efficiency that is significantly raising the bar for innovative designs in these high-volume markets. The modern and innovative SiFive design methodologies bring raw compute density that is a substantial advantage for SiFive Performance products and also translates into significant cost savings for customers.

“The P670 and P470 are specifically designed for, and capable of handling the most demanding workloads for wearables and other advanced consumer applications. These new products offer powerful performance and compute density for companies looking to upgrade from legacy ISAs,” said Chris Jones, SiFive VP of Product. “We have optimized these new RISC-V Vector-enabled products to deliver the performance and efficiency improvements the industry has long been asking for, and we are in evaluations with a number of top-tier customers. Additionally, as the upstream enablement of RISC-V has started within the Android Open Source Project, (AOSP), designers will have unrivaled choice and flexibility as they consider the positive implications with that platform for future designs.”

Features

The SiFive Performance P470 and P670 products offer a finely-tuned combination of compute-density, power efficiency, and robust feature sets ideal for a wide range of applications and markets:

• Support for virtualization, including a separate IOMMU for accelerating virtualized device IO

• Full, Out-of-Order, RISC-V Vector implementation, based on the ratified RISC-V Vector v1.0 Specification

• First to market with the RISC-V Vector Cryptography extensions

• SiFive WorldGuard system security

• Full RISC-V RVA22 profile compliance

• New, Advanced Interrupt Architecture (AIA) compliant interrupt controller, with better support for Message Signal Interrupts (MSI) and virtualization

• Enhanced scalability with fully coherent multi-core, multi-cluster, with support for up to 16 cores

SiFive Performance P670

The P670 is ideal for applications like premium wearables, networking, robotics, and mobile. The P650, which excludes the vector unit, is already shipping to lead customers and is being used in applications that do not require the additional capabilities that vector compute offers or are more area constrained.

The feature rich P670:

• achieves a maximum frequency exceeding 3.4GHz in 5nm,

• has performance of greater than 12 SpecINT2k6/GHz, offering optimized performance in a constrained area and power envelope,

• offers higher single threaded performance and 2x compute density compared to legacy solutions, and

• includes a 2x 128-bit Vector ALUs compliant with the ratified RISC-V Vector v1.0 specification

SiFive Performance P470

The P470 is SiFive’s first efficiency-focused Out-of-Order, area optimized, vector processor, ideal for applications like wearables, consumer, and smart home devices. Expanding on the proven P500-Series, the P470 is significantly smaller than competing solutions and optimized to have best-in-class performance efficiency and area density. The P470 was designed to also serve as a companion to the P670 processor for demanding applications that require a sharing of compute resources while optimizing power consumption.

The P470 offers a significant upgrade to legacy efficiency cores, achieving a maximum frequency exceeding 3.4GHz in 5nm, and greater than 8 SpecINT2k6/GHz, within a minimal area and power envelope.

Other P470 features include:

• 4x compute density in comparison to leading competitor

• Includes 1x 128-bit RISC-V Vector ALU compliant with the ratified RISC-V Vector v1.0 specification

SiFive will also release the P450 – an area-optimized version of the P470 that excludes the Vector Unit.

You may also like:


  • Exceptions, traps, and interrupts, what’s the difference?

  • How does RISC-V fit into automotive systems?

  • What’s the future for RISC-V in 5G?

  • Memory, disk drives, memory fabrics and RISC-V

  • What is the RISC-V ecosystem?

Filed Under: Embedded, RISC-V Tagged With: sifive

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