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Cache coherent interconnect for accelerators test chip will use 7-nm FinFET process technology

September 14, 2017 By Aimee Kalnoskas Leave a Comment

Xilinx, Arm, Cadence Design Systems, Inc., and TSMC announced a collaboration to build the first Cache Coherent Interconnect for Accelerators (CCIX) test chip in TSMC 7nm FinFET process technology for delivery in 2018. The test chip aims to provide a silicon proof point to demonstrate the capabilities of CCIX in enabling multi-core high-performance Arm® CPUs […]

Filed Under: Applications, Connectivity, Data centers, Telecommunications Tagged With: ARM, cadencedesignsystems, tsmc, xilinx

Chip design CAD software supports integrated fan-out advanced packaging, chip-on-wafer-on-substrate packaging technologies

September 14, 2017 By Aimee Kalnoskas Leave a Comment

test software

Mentor, a Siemens business, today announced several enhancements to its Calibre® nmPlatform, Analog FastSPICE™ (AFS™) Platform, Xpedition® Package Integrator and Xpedition Package Designer tools in support of TSMC’s innovative InFO integrated fan-out advanced packaging and CoWoS® chip-on-wafer-on-substrate packaging technologies. The TSMC InFO and CoWoS 3D packaging technologies enable customers to mix multiple silicon dice on a single device and […]

Filed Under: Applications, PCB Design, Tools Tagged With: mentor, siemens, tsmc

Chip design CAD system supports 7-nm FinFET Plus and 12-nm FinFET process technologies

September 14, 2017 By Aimee Kalnoskas Leave a Comment

test software

Mentor, a Siemens business, today announced certification for TSMC’s 12nm FinFET Compact Technology (12FFC) and the latest version of 7nm FinFET Plus processes for its Mentor Calibre® nmPlatformand Analog FastSPICE™ (AFS™) Platform. Nitro-SoCTM place and route system is also certified to support TSMC’s 12FFC process technology. “TSMC is pleased to work closely with Mentor, which continues to increase its […]

Filed Under: PCB Design, Tools Tagged With: mentorgraphics, siemens, tsmc

Logic libraries, embedded memory IP covers 40-nm ultra-low power, 40-nm low-power eFlash designs

September 13, 2017 By Aimee Kalnoskas Leave a Comment

Synopsys, Inc. announced its collaboration with TSMC to develop foundry-sponsored DesignWare Foundation IP, including logic libraries and embedded memories, for TSMC’s 40-nanometer (nm) ultra-low power (ULP) eFlash and 40-nm low-power (LP) eFlash processes. Synopsys’ Foundation IP on TSMC’s 40-nm eFlash processes implements unique features that enable designers to reduce power consumption for IoT designs. The logic […]

Filed Under: Applications, Embedded, IoT, Tools Tagged With: synopsys, tsmc

Chip IP helps implement advanced infotainment, ADAS SoCs in 16-nm FinFET Compact technology

September 8, 2017 By Aimee Kalnoskas Leave a Comment

Cadence Design Systems, Inc. today announced it is delivering a comprehensive automotive IP portfolio for the TSMC 16nm FinFET Compact (16FFC) automotive process technology. This broad IP portfolio enables a host of applications ranging from in-vehicle infotainment, in-cabin electronics, vision subsystems, digital noise reduction and advanced driver assistance system (ADAS) subsystems and is registered in […]

Filed Under: Applications, Automotive Tagged With: cadencedesignsystems, renesaselectronicscorporation, tsmc

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