Andes Technology, RISC-V International, and Green Hills Software announced their collaboration to offer an integrated and optimized platform for safe and secure computing on the AndesCore 25-Series family of RISC-V cores from Andes Technology. The comprehensive software offering from Green Hills Software will include the safety-certified µ-velocity real-time operating system (RTOS), the ASIL-certified MULTI development environment […]
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Global alliance formed to promote open hardware support for women and underrepresented individuals
RISC-V International, a global open hardware standards organization, today announced the launch of the Open Hardware Diversity Alliance. The global Alliance, created by CHIPS Alliance, OpenPOWER Foundation,RISC-V, and Western Digital, will develop and provide learning and networking programs, mentorship opportunities and inclusive environments across the expansive ecosystem of open hardware. The Alliance will be focused […]
RISC-V SoftCPU contest winners announced
The RISC-V Foundation, a non-profit corporation controlled by its members to drive the adoption and implementation of the free and open RISC-V instruction set architecture (ISA), honored the winners of the RISC-V SoftCPU Contest for creating innovative FPGA based CPU implementations targeting the RISC-V ISA. The winners of the contest include: Charles Papon with VexRiscv in […]
RISC-V: an Open Instruction Set Architecture
The benefits of open source have been bestowed upon an Instruction Set Architecture (ISA) called RISC-V. One of the earliest, best-known examples of open source technology is Linux. For a widely accepted, official definition of open source, see The Open Source Initiative. Open source does not stop at Linux, however. One of the more recent […]
