Infineon Technologies has introduced the AURIX Configuration Studio (ACS), a new integrated development environment designed to support engineers developing applications with AURIX TC3x microcontrollers. The platform builds on Infineon’s established DAVE (Digital Application Virtual Engineer) technology, combining an Eclipse-based editor, GNU C compiler, and open-source debugger into a single environment. ACS is intended to simplify the […]
Artificial intelligence/ML
Modular ecosystem supports major IoT connectivity standards
Silicon Labs has introduced the Simplicity Ecosystem, a set of modular development tools designed to streamline embedded IoT design. The suite builds on the company’s long-standing Simplicity Studio platform, extending it into a more flexible environment that integrates installation, debugging, power analysis, and network evaluation in one framework. The new Simplicity Studio 6 release serves […]
Reimagining EV design with AI-enhanced EDA tools
Artificial intelligence (AI)-driven chatbots, tools, and techniques are being deployed across various stages of electric vehicle (EV) design and simulation to support validation and manufacturing. AI can be used as an assistant to increase the effectiveness of conventional EDA tools. When combined with data-driven methods, it can also be used to create reduced-order models (ROMs) […]
MIPS releases multithreaded processor for edge computing
MIPS has announced that the MIPS I8500 processor is now sampling to lead customers. The processor was featured at GlobalFoundries’ Technology Summit in Munich, Germany. The I8500 is a data movement processor IP designed for real-time, event-driven computing platforms targeting hyperscale, storage, automotive, industrial, and communications infrastructure markets. The MIPS I8500 incorporates a scalable multithreaded […]
Post-quantum cryptography support included in compact baseboard management controller design
Nuvoton Technology Corporation has introduced the Arbel NPCM8mnx System-in-Package, a baseboard management controller subsystem designed for AI servers and datacenter platforms. The SiP integrates multiple BMC components into a single package to reduce implementation complexity. The NPCM8mnx-SiP measures 23x23mm² in a BGA package format, which represents approximately 70% less area than discrete component implementations. The […]
Non-transparent bridging isolates multiple host domains in switches
Microchip Technology introduced its Switchtec Gen 6 PCIe switches, manufactured using a 3 nm process. The switches support PCIe 6.0 specifications with up to 160 lanes for AI system connectivity and feature a hardware root of trust with post-quantum safe cryptography compliant with Commercial National Security Algorithm Suite 2.0. PCIe 6.0 delivers 64 GT/s per […]
Cross-vendor configurator streamlines MCU design and migration
Embedd.it has introduced a cross-vendor graphical MCU configurator to simplify hardware design and reduce vendor lock-in for electronics manufacturers. The tool enables hardware decoupling by allowing developers to configure microcontrollers across multiple families and vendors within a single interface. This approach supports faster development cycles and increases flexibility in sourcing components. The configurator integrates data […]
Are there any benefits from generative AI hallucinations?
Generative artificial intelligence (AI) hallucinations, where an AI delivers incorrect or fabricated information, can offer benefits, especially in creative and exploratory domains like drug discovery. There are four common types of AI hallucinations (Figure 1). Not all types are equally desirable or useful. General contradictions include context conflicts and sentence contradictions. For example, an AI […]
AI-native chip with integrates 2 MB SRAM, Cortex-M4F CPU and analog sensor interfaces
Ambient Scientific has introduced the GPX10 Pro, a system-on-chip designed specifically for edge AI applications. The device implements ten programmable AI cores based on the company’s DigAn silicon architecture, which maps neural network matrix-multiply operations and activation flows directly to in-memory analog compute blocks. This structure avoids the overhead of a conventional instruction set, enabling […]
RISC-V processors add matrix processing for AI workloads
SiFive launched its 2nd Generation Intelligence™ family, featuring five new RISC-V-based products designed to accelerate AI workloads across applications. The lineup includes two new products — the X160 Gen 2 and X180 Gen 2 — alongside upgraded X280 Gen 2, X390 Gen 2 and XM Gen 2. These products feature enhanced scalar, vector and, with […]
